PORTO @ Archivio Istituzionale della Ricerca

BERNARDI, PAOLO
 Distribuzione geografica
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Continente #
EU - Europa 17.895
NA - Nord America 17.890
AS - Asia 6.592
SA - Sud America 573
AF - Africa 111
OC - Oceania 10
Continente sconosciuto - Info sul continente non disponibili 7
Totale 43.078
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Nazione #
US - Stati Uniti d'America 17.676
IT - Italia 4.305
GB - Regno Unito 3.586
FR - Francia 3.071
DE - Germania 2.886
CN - Cina 2.374
SG - Singapore 2.270
UA - Ucraina 879
RU - Federazione Russa 866
BR - Brasile 481
KR - Corea 478
TR - Turchia 451
NL - Olanda 395
IE - Irlanda 344
SE - Svezia 308
IL - Israele 261
FI - Finlandia 259
AT - Austria 236
CH - Svizzera 232
HK - Hong Kong 189
CA - Canada 185
IN - India 147
JO - Giordania 132
BE - Belgio 116
JP - Giappone 93
EU - Europa 53
SN - Senegal 45
PL - Polonia 41
RO - Romania 41
VN - Vietnam 40
ID - Indonesia 38
EE - Estonia 29
TW - Taiwan 25
ES - Italia 23
IR - Iran 23
AR - Argentina 22
BG - Bulgaria 22
GR - Grecia 21
CL - Cile 20
CZ - Repubblica Ceca 19
PT - Portogallo 19
LT - Lituania 18
MX - Messico 17
MY - Malesia 16
AP - ???statistics.table.value.countryCode.AP??? 15
EG - Egitto 14
IQ - Iraq 14
PK - Pakistan 14
BD - Bangladesh 13
CO - Colombia 13
AE - Emirati Arabi Uniti 10
DZ - Algeria 10
TH - Thailandia 10
UY - Uruguay 10
UZ - Uzbekistan 10
ZA - Sudafrica 9
AU - Australia 8
DK - Danimarca 8
HR - Croazia 8
MA - Marocco 8
SA - Arabia Saudita 8
VE - Venezuela 8
AL - Albania 7
NO - Norvegia 7
BY - Bielorussia 6
EC - Ecuador 6
LU - Lussemburgo 6
NG - Nigeria 6
PY - Paraguay 6
SK - Slovacchia (Repubblica Slovacca) 6
PE - Perù 5
AZ - Azerbaigian 4
CY - Cipro 4
KE - Kenya 4
KZ - Kazakistan 4
PA - Panama 4
RS - Serbia 4
TN - Tunisia 4
HU - Ungheria 3
LV - Lettonia 3
MD - Moldavia 3
MO - Macao, regione amministrativa speciale della Cina 3
TT - Trinidad e Tobago 3
AM - Armenia 2
BH - Bahrain 2
BO - Bolivia 2
DO - Repubblica Dominicana 2
ET - Etiopia 2
GA - Gabon 2
NP - Nepal 2
PH - Filippine 2
SC - Seychelles 2
SI - Slovenia 2
BN - Brunei Darussalam 1
CI - Costa d'Avorio 1
CU - Cuba 1
GE - Georgia 1
GH - Ghana 1
HN - Honduras 1
JM - Giamaica 1
Totale 43.067
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Città #
Ashburn 4.492
Southend 3.266
Seattle 1.847
Fairfield 1.273
Singapore 1.197
Turin 1.071
Chandler 814
Woodbridge 625
Dallas 541
Houston 500
Princeton 500
Ann Arbor 460
Torino 438
Wilmington 432
Jacksonville 431
Boardman 430
Santa Clara 429
Cambridge 418
Beijing 415
Dublin 327
Berlin 294
Milan 293
Izmir 255
San Ramon 249
Council Bluffs 236
Saint Petersburg 235
Hangzhou 232
Bologna 228
Bern 210
Helsinki 200
Hefei 193
Shanghai 180
Munich 168
Chicago 165
San Donato Milanese 163
Vienna 160
Zhengzhou 152
Seoul 149
Tel Aviv 137
Hong Kong 123
Tongling 123
Zaporozhye 115
Istanbul 114
Des Moines 111
Jerusalem 111
Brussels 107
Mountain View 107
Baltimore 98
Nuremberg 97
Pennsylvania Furnace 97
Buffalo 89
Overberg 87
Monopoli 84
Amsterdam 76
Guangzhou 70
Padua 69
Waterloo 68
San Diego 66
Los Angeles 60
Rome 60
Dearborn 57
Malatya 57
Rotterdam 57
Toronto 53
Aubervilliers 52
New York 52
Paris 51
Shenzhen 50
Bremen 48
Redwood City 48
São Paulo 47
Frankfurt am Main 43
San Francisco 42
London 41
Duncan 40
Frankfurt 40
Penza 36
Fremont 33
Las Vegas 32
Neubiberg 31
Ottawa 30
Turku 28
Washington 28
Herkenbosch 27
Melun 26
Miami 26
Moscow 26
St Petersburg 25
Jakarta 24
Porto Alegre 24
Falls Church 23
Kraków 22
Lappeenranta 22
Norwalk 22
Stuttgart 22
Collegno 21
Sofia 21
Tallinn 20
Varese 20
Yubileyny 20
Totale 27.124
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Nome #
Agri-Food Traceability Management using a RFID System with Privacy Protection 693
Exploiting MOEA to Automatically Generate Test Programs for Path-delay Faults in Microprocessors 545
A SBST strategy to test microprocessors' branch target buffer 468
On the Functional Test of the Register Forwarding and Pipeline Interlocking Unit in Pipelined Processors 467
Peak Power Estimation: A Case Study on CPU Cores 461
Development Flow for On-Line Core Self-Test of Automotive Microcontrollers 450
On-line functionally untestable fault identification in embedded processor cores 444
An Enhanced FPGA-Based Low-Cost Tester Platform Exploiting Effective Test Data Compression for SoCs 426
On the in-Field Functional Testing of Decode Units in Pipelined RISC Processors 418
An effective approach to automatic functional processor test generation for small-delay faults 412
MIHST: A Hardware Technique for Embedded Microprocessor Functional On-line Self-Test 401
An Effective Approach for the Diagnosis of Transition-Delay Faults in SoCs, based on SBST and Scan Chains 394
An enhanced FPGA-based low-cost tester platform exploiting effective test data compression for SoCs 390
Software-based self-test techniques of computational modules in dual issue embedded processors 389
An Effective Methodology for On-line Testing of Embedded Microprocessors 382
On-Line Software-Based Self-Test of the Address Calculation Unit in RISC Processors 382
A Parallel Tester Architecture for Accelerometerand Gyroscope MEMS Calibration and Test 369
Software-based self-test of embedded microprocessors 367
A Comprehensive Methodology for Stress Procedures Evaluation and Comparison for Burn-In of Automotive SoC 367
A Hybrid Approach for Detection and Correction of Transient Faults in SoCs 366
Design of an UHF RFID Transponder for Secure Authentication 365
An adaptive low-cost tester architecture supporting embedded memory volume diagnosis 364
An Optimized Test During Burn-In for Automotive SoC 363
An Anti-Counterfeit Mechanism for the Application Layer in Low-Cost RFID Devices 360
A Deterministic Methodology for Identifying Functionally Untestable Path-Delay Faults in Microprocessor Cores 359
A Functional Test Algorithm for the Register Forwarding and Pipeline Interlocking unit in Pipelined Microprocessors 358
A new hybrid fault detection technique for systems-on-a-chip 357
An efficient method for the test of embedded memory cores during the operational phase 357
Identification and classification of single-event upsets in the configuration memory of sram-based fpgas 351
A DMA and CACHE-based stress schema for burn-in of automotive microcontroller 347
Integrating BIST techniques for on-line SoC testing 343
SW-Based Transparent In-Field Memory Testing 338
An Effective Technique for Minimizing the Cost of Processor Software-Based Diagnosis in SoCs 333
An Effective technique for the Automatic Generation of Diagnosis-oriented Programs for Processor Cores 331
Embedded Memory Diagnosis: An Industrial Workflow 330
A BIST-based Solution for the Diagnosis of Embedded Memories Adopting Image Processing Techniques 327
An Evolutionary Algorithm Approach to Stress Program Generation During Burn-In 325
Test, Reliability and Functional Safety trends for Automotive System-on-Chip 320
A Hybrid Approach to Fault Detection and Correction in SoCs 311
Hardware-Accelerated Path-Delay Fault Grading of Functional Test Programs for Processor-based Systems 309
A Programmable BIST for DRAM Testing and Diagnosis 307
A new Architecture to Cross-Fertilize On-line and Manufacturing Testing 305
On-line Detection of Control-Flow Errors in SoCs by means of an Infrastructure IP core 302
Increasing the Fault Coverage of Processor Devices during the Operational Phase Functional Test 302
System-in-package testing: problems and solutions 302
Microprocessor Testing: Functional Meets Structural Test 301
A fault grading methodology for software-based self-test programs in systems-on-chip 298
An enhanced strategy for functional stress pattern generation for system-on-chip reliability characterization 298
Test Techniques for System-on-Chip: Problems and solutions 297
On the Automatic Generation of Test Programs for Path-Delay Faults in Microprocessor Cores 296
A System-layer Infrastructure for SoC Diagnosis 295
Exploiting an infrastructure-intellectual property for systems-on-chip test, diagnosis and silicon debug 294
Extended Fault Detection Techniques for Systems-on-Chip 294
A tester architecture suitable for MEMS calibration and testing 292
An Evolutionary Methodology to Enhance Processor Software-Based Diagnosis 292
An novel Methodology for Reducing SoC Test Data Volume on FPGA-based Testers 292
Fast Power Evaluation for Effective Generation of Test Programs Maximizing Peak Power Consumption 292
DfT Reuse for Low-Cost Radiation Testing of SoCs: A Case Study 291
Simulation-Based Analysis of SEU Effects in SRAM-Based FPGAs 290
An Innovative and Low-Cost Industrial Flow for Reliability Characterization of SoCs 289
Fault grading of software-based self-test procedures for dependable automotive applications 288
An optimized hybrid approach to provide fault detection and correction in SoCs 286
On the automation of the test flow of complex SoCs 286
On the evaluation of SEU sensitiveness in SRAM-based FPGAs 286
An Effective Technique for Minimizing the Cost of Processor Software-Based Diagnosis in SoCs 284
Diagnosing faulty functional units in processors by using automatically generated test sets 284
A novel SBST generation technique for path-delay faults in microprocessors based on BDD analysis and evolutionary algorithm 284
Thermal issues in test: An overview of the significant aspects and industrial practice 284
A pattern ordering algorithm for reducing the size of fault dictionaries 282
Automatic Functional Stress Pattern Generation for SoC Reliability Characterization 282
Software-Based On-Line Test of Communication Peripherals in Processor-Based Systems for Automotive Applications 282
Exploring the Impact of Functional Test Programs Re-Used for Power-Aware Testing 281
In-field functional test programs development flow for embedded FPUs 280
Adaptive Management Techniques for Optimized Burn-In of Safety-Critical SoC 280
Optimized embedded memory diagnosis 279
An effective ATPG flow for Gate Delay Faults 279
Increasing fault coverage during functional test in the operational phase2013 IEEE 19th International On-Line Testing Symposium (IOLTS) 279
A P1500-compatible programmable BIST approach for the test of embedded flash memories 279
Testing logic cores using a BIST P1500 compliant approach: a case of study 279
An Exact and Efficient Critical Path Tracing Algorithm 278
Scan-Chain Intra-Cell Aware Testing 277
An effective approach for functional test programs compaction 274
Evaluating the effects of SEUs affecting the configuration memory of an SRAM-based FPGA 274
Evaluating Alpha-induced Soft Errors in Embedded Microprocessors 273
Using Infrastructure IPs to support SW-based Self-Test of Processor Cores 272
Faster-than-at-speed execution of functional programs: an experimental analysis 269
An adaptive tester architecture for volume diagnosis 269
An I-IP Based Approach for the Monitoring of NBTI Effects in SoCs 263
HYBRID FAULT DETECTION TECHNIQUE A CASE STUDY ON VIRTEX-II PRO'S POWERPC 262
On the Modeling of Gate Delay Faults by Means of Transition Delay Faults 259
Test Considerations about the Structured ASIC Paradigm 257
SoC Symbolic Simulation: a case study on delay fault testing 257
Exploiting an I-IP for both test and silicon debug of microprocessor cores 257
An integrated approach for increasing the soft-error detection capabilities in SoCs processors 256
An Effective Fault-Injection Framework for Memory Reliability Enhancement Perspectives 255
Software-Based Self-Test Techniques for Dual-Issue Embedded Processors 252
A Novel Approach to Extract Embedded Memory Design Parameter Through Irradiation Test 252
An Automatic Functional Stress Pattern Generation Technique Suitable for SoC Reliability Characterization 249
Scan-Chain Intra-Cell Defects Grading 248
Exploiting an I-IP for In-field SOC test 245
Totale 32.230
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Categoria #
all - tutte 121.838
article - articoli 23.741
book - libri 864
conference - conferenze 93.981
curatela - curatele 0
other - altro 484
patent - brevetti 0
selected - selezionate 0
volume - volumi 2.768
Totale 243.676
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/20211.777 0 0 0 341 124 206 184 211 146 257 189 119
2021/20221.891 115 137 46 49 133 123 84 117 74 146 391 476
2022/20233.296 236 489 180 248 307 436 279 156 415 30 164 356
2023/20241.359 115 139 83 99 156 219 69 91 37 49 126 176
2024/20256.599 129 785 210 762 449 490 415 769 909 284 533 864
2025/20262.511 515 995 864 137 0 0 0 0 0 0 0 0
Totale 43.363