BERNARDI, PAOLO
 Distribuzione geografica
Continente #
NA - Nord America 20.359
EU - Europa 20.206
AS - Asia 12.952
SA - Sud America 789
AF - Africa 161
OC - Oceania 15
Continente sconosciuto - Info sul continente non disponibili 7
Totale 54.489
Nazione #
US - Stati Uniti d'America 20.038
IT - Italia 4.887
SG - Singapore 4.264
GB - Regno Unito 3.604
FR - Francia 3.381
DE - Germania 2.898
CN - Cina 2.820
VN - Vietnam 2.600
RU - Federazione Russa 2.142
UA - Ucraina 876
HK - Hong Kong 651
KR - Corea 647
BR - Brasile 629
TR - Turchia 462
NL - Olanda 416
IN - India 367
IE - Irlanda 353
SE - Svezia 316
FI - Finlandia 280
IL - Israele 267
AT - Austria 241
CA - Canada 240
CH - Svizzera 235
JP - Giappone 162
JO - Giordania 141
BD - Bangladesh 126
BE - Belgio 116
PH - Filippine 74
TH - Thailandia 68
TW - Taiwan 67
ID - Indonesia 58
PL - Polonia 55
EU - Europa 52
IQ - Iraq 52
MX - Messico 51
AR - Argentina 46
RO - Romania 44
SN - Senegal 44
ES - Italia 38
PK - Pakistan 34
EE - Estonia 30
CL - Cile 26
CO - Colombia 24
IR - Iran 24
CZ - Repubblica Ceca 23
BG - Bulgaria 22
GR - Grecia 22
EC - Ecuador 21
LT - Lituania 21
MY - Malesia 21
PT - Portogallo 21
ZA - Sudafrica 20
UZ - Uzbekistan 18
EG - Egitto 17
KE - Kenya 15
MA - Marocco 15
AP - ???statistics.table.value.countryCode.AP??? 14
VE - Venezuela 14
AU - Australia 13
DZ - Algeria 13
AE - Emirati Arabi Uniti 12
UY - Uruguay 12
SA - Arabia Saudita 11
TN - Tunisia 11
AL - Albania 10
DK - Danimarca 9
HR - Croazia 8
NP - Nepal 8
AZ - Azerbaigian 7
KZ - Kazakistan 7
PA - Panama 7
PY - Paraguay 7
SK - Slovacchia (Repubblica Slovacca) 7
BY - Bielorussia 6
NG - Nigeria 6
NO - Norvegia 6
PE - Perù 6
ET - Etiopia 5
LU - Lussemburgo 5
NI - Nicaragua 5
RS - Serbia 5
CY - Cipro 4
DO - Repubblica Dominicana 4
HU - Ungheria 4
JM - Giamaica 4
LV - Lettonia 4
MD - Moldavia 4
OM - Oman 4
TT - Trinidad e Tobago 4
BH - Bahrain 3
BO - Bolivia 3
GA - Gabon 3
KW - Kuwait 3
MO - Macao, regione amministrativa speciale della Cina 3
PS - Palestinian Territory 3
SI - Slovenia 3
AM - Armenia 2
BW - Botswana 2
CR - Costa Rica 2
GE - Georgia 2
Totale 54.457
Città #
Ashburn 4.867
Southend 3.244
Singapore 2.601
Seattle 1.839
Turin 1.457
Fairfield 1.261
San Jose 1.027
Chandler 806
Ho Chi Minh City 691
Hanoi 626
Woodbridge 619
Dallas 559
Hong Kong 513
Houston 507
Princeton 497
Beijing 473
Santa Clara 473
Ann Arbor 458
Torino 434
Wilmington 429
Boardman 428
Jacksonville 426
Cambridge 415
Milan 337
Dublin 335
Hefei 311
Berlin 293
Seoul 280
Los Angeles 275
Council Bluffs 266
Izmir 254
San Ramon 248
Hangzhou 236
Bologna 235
Saint Petersburg 233
Helsinki 214
Bern 208
Shanghai 185
Chicago 170
Munich 168
Vienna 164
Lauterbourg 161
San Donato Milanese 161
Moscow 154
Zhengzhou 149
Tel Aviv 137
Tongling 122
Buffalo 119
Istanbul 118
Zaporozhye 114
Da Nang 111
Des Moines 111
Jerusalem 111
Frankfurt am Main 109
Brussels 107
Mountain View 107
Haiphong 101
Baltimore 99
Nuremberg 98
New York 97
Pennsylvania Furnace 96
Amsterdam 86
Overberg 86
Monopoli 83
Rome 80
Guangzhou 78
São Paulo 75
Padua 71
Waterloo 67
San Diego 65
Toronto 65
Malatya 57
Rotterdam 57
Tokyo 57
Dearborn 56
Aubervilliers 52
Paris 52
London 51
Shenzhen 51
Bremen 48
North Bergen 48
Redwood City 47
San Francisco 46
Duncan 40
Frankfurt 40
Penza 36
Fremont 34
Las Vegas 32
Montreal 32
Hải Dương 31
Neubiberg 31
Ottawa 31
Chennai 30
Lappeenranta 29
Porto Alegre 29
The Dalles 29
Can Tho 28
Jakarta 28
Miami 28
Turku 28
Totale 33.358
Nome #
Agri-Food Traceability Management using a RFID System with Privacy Protection 809
Exploiting MOEA to Automatically Generate Test Programs for Path-delay Faults in Microprocessors 588
On the Functional Test of the Register Forwarding and Pipeline Interlocking Unit in Pipelined Processors 572
Peak Power Estimation: A Case Study on CPU Cores 552
A SBST strategy to test microprocessors' branch target buffer 527
Development Flow for On-Line Core Self-Test of Automotive Microcontrollers 518
On-line functionally untestable fault identification in embedded processor cores 510
An effective approach to automatic functional processor test generation for small-delay faults 480
An Enhanced FPGA-Based Low-Cost Tester Platform Exploiting Effective Test Data Compression for SoCs 480
On the in-Field Functional Testing of Decode Units in Pipelined RISC Processors 478
A Parallel Tester Architecture for Accelerometerand Gyroscope MEMS Calibration and Test 469
MIHST: A Hardware Technique for Embedded Microprocessor Functional On-line Self-Test 466
An Effective Approach for the Diagnosis of Transition-Delay Faults in SoCs, based on SBST and Scan Chains 461
On-Line Software-Based Self-Test of the Address Calculation Unit in RISC Processors 446
An Optimized Test During Burn-In for Automotive SoC 446
An efficient method for the test of embedded memory cores during the operational phase 444
An Effective Methodology for On-line Testing of Embedded Microprocessors 441
Software-based self-test techniques of computational modules in dual issue embedded processors 440
Software-based self-test of embedded microprocessors 434
A Comprehensive Methodology for Stress Procedures Evaluation and Comparison for Burn-In of Automotive SoC 434
A Functional Test Algorithm for the Register Forwarding and Pipeline Interlocking unit in Pipelined Microprocessors 433
An adaptive low-cost tester architecture supporting embedded memory volume diagnosis 427
A DMA and CACHE-based stress schema for burn-in of automotive microcontroller 423
A new hybrid fault detection technique for systems-on-a-chip 419
A Hybrid Approach for Detection and Correction of Transient Faults in SoCs 411
Design of an UHF RFID Transponder for Secure Authentication 411
SW-Based Transparent In-Field Memory Testing 410
An Anti-Counterfeit Mechanism for the Application Layer in Low-Cost RFID Devices 409
Identification and classification of single-event upsets in the configuration memory of sram-based fpgas 401
Test, Reliability and Functional Safety trends for Automotive System-on-Chip 400
An Evolutionary Algorithm Approach to Stress Program Generation During Burn-In 396
Integrating BIST techniques for on-line SoC testing 392
A Deterministic Methodology for Identifying Functionally Untestable Path-Delay Faults in Microprocessor Cores 389
An enhanced strategy for functional stress pattern generation for system-on-chip reliability characterization 385
An Effective technique for the Automatic Generation of Diagnosis-oriented Programs for Processor Cores 384
Microprocessor Testing: Functional Meets Structural Test 381
A Programmable BIST for DRAM Testing and Diagnosis 377
On-line Detection of Control-Flow Errors in SoCs by means of an Infrastructure IP core 376
An Effective Technique for Minimizing the Cost of Processor Software-Based Diagnosis in SoCs 376
A BIST-based Solution for the Diagnosis of Embedded Memories Adopting Image Processing Techniques 371
Embedded Memory Diagnosis: An Industrial Workflow 368
Increasing fault coverage during functional test in the operational phase2013 IEEE 19th International On-Line Testing Symposium (IOLTS) 361
A tester architecture suitable for MEMS calibration and testing 358
Increasing the Fault Coverage of Processor Devices during the Operational Phase Functional Test 358
Fault grading of software-based self-test procedures for dependable automotive applications 357
Adaptive Management Techniques for Optimized Burn-In of Safety-Critical SoC 354
Fast Power Evaluation for Effective Generation of Test Programs Maximizing Peak Power Consumption 351
System-in-package testing: problems and solutions 350
Faster-than-at-speed execution of functional programs: an experimental analysis 349
A Hybrid Approach to Fault Detection and Correction in SoCs 349
A new Architecture to Cross-Fertilize On-line and Manufacturing Testing 347
Simulation-Based Analysis of SEU Effects in SRAM-Based FPGAs 346
An effective approach for functional test programs compaction 345
Hardware-Accelerated Path-Delay Fault Grading of Functional Test Programs for Processor-based Systems 344
Diagnosing faulty functional units in processors by using automatically generated test sets 344
Scan-Chain Intra-Cell Aware Testing 342
A fault grading methodology for software-based self-test programs in systems-on-chip 340
A Novel Approach to Extract Embedded Memory Design Parameter Through Irradiation Test 340
Test Techniques for System-on-Chip: Problems and solutions 339
An Effective Technique for Minimizing the Cost of Processor Software-Based Diagnosis in SoCs 338
Exploiting an infrastructure-intellectual property for systems-on-chip test, diagnosis and silicon debug 336
An effective ATPG flow for Gate Delay Faults 335
An Evolutionary Methodology to Enhance Processor Software-Based Diagnosis 335
Extended Fault Detection Techniques for Systems-on-Chip 335
Evaluating the effects of SEUs affecting the configuration memory of an SRAM-based FPGA 334
On the Modeling of Gate Delay Faults by Means of Transition Delay Faults 333
Software-Based On-Line Test of Communication Peripherals in Processor-Based Systems for Automotive Applications 332
An optimized hybrid approach to provide fault detection and correction in SoCs 331
Optimized embedded memory diagnosis 331
On the Automatic Generation of Test Programs for Path-Delay Faults in Microprocessor Cores 331
A System-layer Infrastructure for SoC Diagnosis 329
Testing logic cores using a BIST P1500 compliant approach: a case of study 329
An novel Methodology for Reducing SoC Test Data Volume on FPGA-based Testers 328
Exploring the Impact of Functional Test Programs Re-Used for Power-Aware Testing 327
In-field functional test programs development flow for embedded FPUs 327
DfT Reuse for Low-Cost Radiation Testing of SoCs: A Case Study 327
Thermal issues in test: An overview of the significant aspects and industrial practice 325
An Exact and Efficient Critical Path Tracing Algorithm 324
Automatic Functional Stress Pattern Generation for SoC Reliability Characterization 323
A P1500-compatible programmable BIST approach for the test of embedded flash memories 323
On the evaluation of SEU sensitiveness in SRAM-based FPGAs 320
A novel SBST generation technique for path-delay faults in microprocessors based on BDD analysis and evolutionary algorithm 319
An adaptive tester architecture for volume diagnosis 318
On the automation of the test flow of complex SoCs 317
An Innovative and Low-Cost Industrial Flow for Reliability Characterization of SoCs 316
A pattern ordering algorithm for reducing the size of fault dictionaries 315
On-Line Software-based Self-Test for ECC of Embedded RAM Memories 315
Software-Based Self-Test Techniques for Dual-Issue Embedded Processors 314
Improving the Functional Test Delay Fault Coverage: A Microprocessor Case Study 309
Evaluating Alpha-induced Soft Errors in Embedded Microprocessors 308
Cumulative embedded memory failure bitmap display & analysis 306
Test, Reliability and Functional Safety Trends for Automotive System-on-Chip 303
An Effective Fault-Injection Framework for Memory Reliability Enhancement Perspectives 302
HYBRID FAULT DETECTION TECHNIQUE A CASE STUDY ON VIRTEX-II PRO'S POWERPC 301
Scan-Chain Intra-Cell Defects Grading 300
Using Infrastructure IPs to support SW-based Self-Test of Processor Cores 298
An I-IP Based Approach for the Monitoring of NBTI Effects in SoCs 296
An integrated approach for increasing the soft-error detection capabilities in SoCs processors 296
Test Considerations about the Structured ASIC Paradigm 293
Exploiting an I-IP for both test and silicon debug of microprocessor cores 292
Totale 37.679
Categoria #
all - tutte 142.768
article - articoli 28.632
book - libri 965
conference - conferenze 109.349
curatela - curatele 0
other - altro 611
patent - brevetti 0
selected - selezionate 0
volume - volumi 3.211
Totale 285.536


Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/2021306 0 0 0 0 0 0 0 0 0 0 188 118
2021/20221.877 115 136 46 47 132 122 83 117 74 146 385 474
2022/20233.272 235 485 180 246 307 431 276 155 410 30 163 354
2023/20241.354 114 139 83 99 156 219 69 91 37 48 126 173
2024/20256.555 128 780 210 758 445 486 413 765 905 282 528 855
2025/202614.327 511 991 860 1.034 914 897 2.158 1.414 3.094 2.012 442 0
Totale 54.801