Functional microprocessor test methods provide several advantages compared to DFT approaches, like reduced chip cost and at-speed execution. However, the automatic generation of functional test patterns is an open issue. In this work we present an approach for the automatic generation of functional microprocessor test sequences for small-delay faults based on Bounded Model Checking. We utilize an ATPG framework for small-delayfaults in sequential, non-scan circuits and propose a method for constraining the input space for generating functional test sequences (i.e., test programs). We verify our approach by evaluating the miniMIPS microprocessor. In our experiments we were able to reach over 97 % fault efficiency. To the best of our knowledge, this is the first fully automated approach to functional microprocessor test for small-delay faults.

An effective approach to automatic functional processor test generation for small-delay faults / Riefert, Andreas; Ciganda, LYL MERCEDES; Sauer, Matthias; Bernardi, Paolo; SONZA REORDA, Matteo; Becker, Bernd. - (2014). ((Intervento presentato al convegno Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014 tenutosi a Dresden, Germany nel March 2014 [10.7873/DATE2014.140].

An effective approach to automatic functional processor test generation for small-delay faults

CIGANDA, LYL MERCEDES;BERNARDI, PAOLO;SONZA REORDA, Matteo;
2014

Abstract

Functional microprocessor test methods provide several advantages compared to DFT approaches, like reduced chip cost and at-speed execution. However, the automatic generation of functional test patterns is an open issue. In this work we present an approach for the automatic generation of functional microprocessor test sequences for small-delay faults based on Bounded Model Checking. We utilize an ATPG framework for small-delayfaults in sequential, non-scan circuits and propose a method for constraining the input space for generating functional test sequences (i.e., test programs). We verify our approach by evaluating the miniMIPS microprocessor. In our experiments we were able to reach over 97 % fault efficiency. To the best of our knowledge, this is the first fully automated approach to functional microprocessor test for small-delay faults.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/2542889
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