Archivio Istituzionale della RicercaBERNARDI, PAOLO
BERNARDI, PAOLO
Dipartimento di Automatica e Informatica
012326
Exploiting weak detections for optimizing pattern generation in Defect-Oriented Cell-Aware ATPG
In corso di stampa Ciullo, Alessandro; Eggersglüß, Stephan; Tille, Daniel; Glowatz, Andreas; Iaria, Giusy; Bernardi, Paolo
HW/SW Co-Design of a Reliable Deep Space System exploiting Application-profiled RAM Scrubbing
In corso di stampa Di Gruttola Giardino, Nicola; Bernardi, Paolo; Corpino, Sabrina; Stesina, Fabrizio
Netlist-Independent Functional Stress Pattern generation strategy for AI HW Accelerators embedded into SoCs
In corso di stampa Filipponi, Gabriele; Schwachhofer, Denis; Angione, Francesco; Bertani, Claudia; Corbellini, Simone; Di Gruttola Giardino, Nicola; Garozzo, Giuseppe; Insinga, Giorgio; Tancorre, Vincenzo; Bernardi, Paolo
Smart Heuristics for Maximum Common Subgraph Sub-Estimation in Large Digital Circuits
In corso di stampa Bernardi, Paolo; Cardone, Lorenzo; Quer, Stefano
A Comprehensive Scan Test Cost Model to Optimize the Production of very large SoCs
2025 Iaria, Giusy; Bernardi, Paolo; Bertani, Claudia; Cardone, Lorenzo; Garozzo, Giuseppe; Tancorre, Vincenzo
A Cost–Benefit Analysis of Multi-Site Wafer Testing
2025 Foscale, Tommaso; Bernardi, Paolo
A Novel Indirect Methodology based on Execution Traces for Grading Functional Test Programs
2025 Angione, Francesco; Bernardi, Paolo; Calabrese, Andrea; Cardone, Lorenzo; Quer, Stefano; Bertani, Claudia; Tancorre, Vincenzo
A System-Level Test Methodology for Communication Peripherals in System-on-Chips
2025 Angione, Francesco; Bernardi, Paolo; Di Gruttola Giardino, Nicola; Filipponi, Gabriele; Bertani, Claudia; Tancorre, Vincenzo
Automatic Generation of System-Level Test for Un-Core Logic of Large Automotive SoC
2025 Angione, Francesco; Bernardi, Paolo; Iaria, Giusy; Bertani, Claudia; Tancorre, Vincenzo
Enhancing Logic Diagnosis of field returns through Logic BIST in Automotive SoCs
2025 Bernardi, Paolo; Filipponi, Gabriele; Iaria, Giusy; Bertani, Claudia; Tancorre, Vincenzo
European Test Symposium Teams: an Anniversary Snapshot
2025 Jenihhin, M.; Raik, J.; Jutman, A.; Cherezova, N.; Ubar, R.; Miclea, L.; Enyedi, S.; Ştefan, I.; Stan, O.; Corcheş, C.; Peng, Z.; Eles, P.; Drechsler, R.; Eggersglüß, S.; Fey, G.; Glowatz, A.; Tille, D.; Gielen, G.; Coyette, A.; Dobbelaere, W.; Vanhooren, R.; Chuang, P. -Y.; Marinissen, E. J.; Di Natale, G.; Barragan, M.; Maistri, P.; Mir, S.; Vatajelu, E. -I.; Bernardi, P.; Di Carlo, S.; Prinetto, P.; Reorda, M. Sonza; Violante, M.; Stratigopoulos, H. -G.; Michael, M. K.; Neophytou, S.; Hadjitheophanous, S.; Christou, K.; Skitsas, M.; Bosio, A.; Deveautour, B.; Girard, P.; Traiola, M.; Virazel, A.; Dos Santos, F. Fernandes; Kritikakou, A.; Casagranda, G.; Vallero, M.; Vella, F.; Rech, P.; Bolzani Poehls, L. M.; Krstic, M.; Andjelkovic, M.; Vargas, F.; Tshagharyan, G.; Harutyunyan, G.; Vardanian, V.; Shoukourian, S.; Zorian, Y.; Dworak, J.; Nepal, K.; Manikas, T.; Taouil, M.; Fieback, M.; Gebregiorgis, A.; Bishnoi, R.; Hamdioui, S.; Chatterjee, A.; Saha, A.; Komarraju, S.; Ma, K.; Amarnath, C.; Tahoori, M.; Mayahinia, M.; Rajabalipanah, M.; Basharkhah, K.; Nosrati, N.; Jahanpeima, Z.; Navabi, Z.; Wunderlich, H. -J.; Hellebrand, S.
Extended design and linearity analysis of a 6-bit low-area hybrid ADC design for local system-on-chip measurements
2025 Kolahimahmoudi, Nima; Insinga, Giorgio; Bernardi, Paolo
From Structural Test Escapes to Silent Data Errors: A preliminary analysis
2025 Angione, Francesco; Bernardi, Paolo; Sinha, Arani
Leveraging ATE to optimize System-Level-Test for Multicore Automotive SoCs
2025 Angione, Francesco; Bernardi, Paolo; Bertani, Claudia; Bertetto, Lorenzo; Cardone, Lorenzo; DI GRUTTOLA GIARDINO, Nicola; Quer, Stefano; Tancorre, Vincenzo
Special Session: Trustworthy Hardware-AI at the Cloud
2025 Angione, Francesco; Bernardi, Paolo; Bosio, Alberto; Dattatraya Dixit, Harish; Pappalardo, Salvatore; Ruospo, Annachiara; Sanchez, Ernesto; Sinha, Arani; Turco, Vittorio
System-Level Test techniques for Automotive SoCs
2025 Angione, Francesco; Bernardi, Paolo; Cantoro, Riccardo
A 6-bit Low-Area Hybrid ADC Design For System-on-Chip Measurements
2024 Bernardi, Paolo; Kolahimahmoudi, Nima; Insinga, Giorgio
A Flexible FPGA-based Test Equipment for Enabling Out-of-Production Manufacturing Test Flow of Digital Systems
2024 Di Gruttola Giardino, Nicola; Angione, Francesco; Bernardi, Paolo; Foscale, Tommaso; Bertani And Vincenzo Tancorre, Claudia
Built-In Self-Test Architecture Enabling Diagnosis for Massive Embedded Memory Banks in Large SoCs
2024 Bernardi, Paolo; Guerriero, Augusto Maria; Insinga, Giorgio; Paganini, Giovanni; Carnevale, Giambattista; Coppetta, Matteo; Mischo, Walter; Ullmann, Rudolf
Exploring trade-offs in multi-site wafer testing
2024 Bernardi, Paolo; Cardone, Lorenzo; Foscale, Tommaso
| Citazione | Data di pubblicazione | Autori | File |
|---|---|---|---|
| Exploiting weak detections for optimizing pattern generation in Defect-Oriented Cell-Aware ATPG / Ciullo, Alessandro; Eggersglüß, Stephan; Tille, Daniel; Glowatz, Andreas; Iaria, Giusy; Bernardi, Paolo. - (In corso di stampa). (Intervento presentato al convegno IEEE International Test Conference ASIA 2025 tenutosi a Tokyo (JPN) nel December 16–19, 2025). | In corso di stampa | Iaria, GiusyBernardi, Paolo + | - |
| HW/SW Co-Design of a Reliable Deep Space System exploiting Application-profiled RAM Scrubbing / Di Gruttola Giardino, Nicola; Bernardi, Paolo; Corpino, Sabrina; Stesina, Fabrizio. - (In corso di stampa). ( 38th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems Barcelona (Spain) ). | In corso di stampa | Nicola di Gruttola GiardinoPaolo BernardiSabrina CorpinoFabrizio Stesina | DFTS25_ECC_Methodologies_Camera_Ready_IEEE_Approved.pdf |
| Netlist-Independent Functional Stress Pattern generation strategy for AI HW Accelerators embedded into SoCs / Filipponi, Gabriele; Schwachhofer, Denis; Angione, Francesco; Bertani, Claudia; Corbellini, Simone; Di Gruttola Giardino, Nicola; Garozzo, Giuseppe; Insinga, Giorgio; Tancorre, Vincenzo; Bernardi, Paolo. - In: IEEE TRANSACTIONS ON COMPUTERS. - ISSN 1557-9956. - (In corso di stampa). | In corso di stampa | Gabriele FilipponiFrancesco AngioneSimone CorbelliniNicola di Gruttola GiardinoGiorgio InsingaPaolo Bernardi + | ToC_AMU_accept.pdf |
| Smart Heuristics for Maximum Common Subgraph Sub-Estimation in Large Digital Circuits / Bernardi, Paolo; Cardone, Lorenzo; Quer, Stefano. - (In corso di stampa). (Intervento presentato al convegno IWLS 2025 tenutosi a Verona (IT) nel 20/05/2024 - 24/05/2024). | In corso di stampa | Bernardi,PaoloCardone,LorenzoQuer,Stefano | - |
| A Comprehensive Scan Test Cost Model to Optimize the Production of very large SoCs / Iaria, Giusy; Bernardi, Paolo; Bertani, Claudia; Cardone, Lorenzo; Garozzo, Giuseppe; Tancorre, Vincenzo. - In: IEEE TRANSACTIONS ON COMPUTERS. - ISSN 0018-9340. - 74:4(2025), pp. 1278-1292. [10.1109/TC.2024.3521246] | 1-gen-2025 | Iaria, GiusyBernardi, PaoloCardone, Lorenzo + | A_Comprehensive_Scan_Test_Cost_Model_to_Optimize_the_Production_of_Very_Large_SoCs.pdf |
| A Cost–Benefit Analysis of Multi-Site Wafer Testing / Foscale, Tommaso; Bernardi, Paolo. - In: ELECTRONICS. - ISSN 2079-9292. - 14:12(2025). [10.3390/electronics14122450] | 1-gen-2025 | Foscale, TommasoBernardi, Paolo | A Cost–Benefit Analysis of Multi-Site Wafer Testing.pdf |
| A Novel Indirect Methodology based on Execution Traces for Grading Functional Test Programs / Angione, Francesco; Bernardi, Paolo; Calabrese, Andrea; Cardone, Lorenzo; Quer, Stefano; Bertani, Claudia; Tancorre, Vincenzo. - In: IEEE TRANSACTIONS ON COMPUTERS. - ISSN 0018-9340. - 74:11(2025), pp. 3582-3595. [10.1109/tc.2025.3600005] | 1-gen-2025 | Angione, FrancescoBernardi, PaoloCalabrese, AndreaCardone, LorenzoQuer, Stefano + | A_Novel_Indirect_Methodology_based_on_Execution_Traces_for_Grading_Functional_Test_Programs.pdf; A_Novel_Indirect_Methodology_Based_on_Execution_Traces_for_Grading_Functional_Test_Programs.pdf |
| A System-Level Test Methodology for Communication Peripherals in System-on-Chips / Angione, Francesco; Bernardi, Paolo; Di Gruttola Giardino, Nicola; Filipponi, Gabriele; Bertani, Claudia; Tancorre, Vincenzo. - In: IEEE TRANSACTIONS ON COMPUTERS. - ISSN 0018-9340. - 74:2(2025), pp. 731-739. [10.1109/TC.2024.3500375] | 1-gen-2025 | Francesco AngionePaolo BernardiNicola di Gruttola GiardinoGabriele Filipponi + | A_System-Level_Test_Methodology_for_Communication_Peripherals_in_System-on-Chips.pdf |
| Automatic Generation of System-Level Test for Un-Core Logic of Large Automotive SoC / Angione, Francesco; Bernardi, Paolo; Iaria, Giusy; Bertani, Claudia; Tancorre, Vincenzo. - In: IEEE TRANSACTIONS ON COMPUTERS. - ISSN 0018-9340. - 74:9(2025), pp. 3195-3209. [10.1109/tc.2025.3587515] | 1-gen-2025 | Angione, FrancescoBernardi, PaoloIaria, Giusy + | Automatic_Generation_of_System-Level_Test_for_Un-Core_Logic_of_Large_Automotive_SoC.pdf |
| Enhancing Logic Diagnosis of field returns through Logic BIST in Automotive SoCs / Bernardi, Paolo; Filipponi, Gabriele; Iaria, Giusy; Bertani, Claudia; Tancorre, Vincenzo. - (2025). ( 2025 IEEE Latin American Test Symposium San Andres Islas (COL) 11-14 March 2025) [10.1109/LATS65346.2025.10963955]. | 1-gen-2025 | Paolo BernardiGabriele FilipponiGiusy Iaria + | LATS_2025.pdf; Enhancing_Logic_Diagnosis_of_Field_Returns_Through_Logic_BIST_in_Automotive_SoCs.pdf |
| European Test Symposium Teams: an Anniversary Snapshot / Jenihhin, M.; Raik, J.; Jutman, A.; Cherezova, N.; Ubar, R.; Miclea, L.; Enyedi, S.; Ştefan, I.; Stan, O.; Corcheş, C.; Peng, Z.; Eles, P.; Drechsler, R.; Eggersglüß, S.; Fey, G.; Glowatz, A.; Tille, D.; Gielen, G.; Coyette, A.; Dobbelaere, W.; Vanhooren, R.; Chuang, P. -Y.; Marinissen, E. J.; Di Natale, G.; Barragan, M.; Maistri, P.; Mir, S.; Vatajelu, E. -I.; Bernardi, P.; Di Carlo, S.; Prinetto, P.; Reorda, M. Sonza; Violante, M.; Stratigopoulos, H. -G.; Michael, M. K.; Neophytou, S.; Hadjitheophanous, S.; Christou, K.; Skitsas, M.; Bosio, A.; Deveautour, B.; Girard, P.; Traiola, M.; Virazel, A.; Dos Santos, F. Fernandes; Kritikakou, A.; Casagranda, G.; Vallero, M.; Vella, F.; Rech, P.; Bolzani Poehls, L. M.; Krstic, M.; Andjelkovic, M.; Vargas, F.; Tshagharyan, G.; Harutyunyan, G.; Vardanian, V.; Shoukourian, S.; Zorian, Y.; Dworak, J.; Nepal, K.; Manikas, T.; Taouil, M.; Fieback, M.; Gebregiorgis, A.; Bishnoi, R.; Hamdioui, S.; Chatterjee, A.; Saha, A.; Komarraju, S.; Ma, K.; Amarnath, C.; Tahoori, M.; Mayahinia, M.; Rajabalipanah, M.; Basharkhah, K.; Nosrati, N.; Jahanpeima, Z.; Navabi, Z.; Wunderlich, H. -J.; Hellebrand, S.. - ELETTRONICO. - (2025), pp. 1-48. ( 2025 IEEE European Test Symposium, ETS 2025 Tallinn, Estonia 26-30 May 2025) [10.1109/ets63895.2025.11049652]. | 1-gen-2025 | Bernardi, P.Di Carlo, S.Prinetto, P.Violante, M. + | European_Test_Symposium_Teams_an_Anniversary_Snapshot.pdf; ETSteams_2025_Draft1.pdf |
| Extended design and linearity analysis of a 6-bit low-area hybrid ADC design for local system-on-chip measurements / Kolahimahmoudi, Nima; Insinga, Giorgio; Bernardi, Paolo. - In: MICROPROCESSORS AND MICROSYSTEMS. - ISSN 0141-9331. - 118:(2025). [10.1016/j.micpro.2025.105191] | 1-gen-2025 | Nima KolahimahmoudiGiorgio InsingaPaolo Bernardi | 1-s2.0-S0141933125000584-main.pdf |
| From Structural Test Escapes to Silent Data Errors: A preliminary analysis / Angione, Francesco; Bernardi, Paolo; Sinha, Arani. - ELETTRONICO. - (2025). ( 2025 IEEE 9th International Test Conference India (ITC India) Bangalore (IND) 20-22 July 2025) [10.1109/ITCIndia66078.2025.11141623]. | 1-gen-2025 | Francesco AngionePaolo Bernardi + | From_Structural_Test_Escapes_to_Silent_Data_Errors_A_Preliminary_Analysis.pdf |
| Leveraging ATE to optimize System-Level-Test for Multicore Automotive SoCs / Angione, Francesco; Bernardi, Paolo; Bertani, Claudia; Bertetto, Lorenzo; Cardone, Lorenzo; DI GRUTTOLA GIARDINO, Nicola; Quer, Stefano; Tancorre, Vincenzo. - (2025), pp. 1-6. ( Latin American Test Symposium San Andres Islas, Colombia 11-14 March 2025) [10.1109/LATS65346.2025.10963947]. | 1-gen-2025 | Francesco AngionePaolo BernardiLorenzo BertettoLorenzo CardoneNicola Di Gruttola GiardinoStefano Quer + | Leveraging_ATE_to_Optimize_System-Level-Test_for_Multicore_Automotive_SoCs.pdf |
| Special Session: Trustworthy Hardware-AI at the Cloud / Angione, Francesco; Bernardi, Paolo; Bosio, Alberto; Dattatraya Dixit, Harish; Pappalardo, Salvatore; Ruospo, Annachiara; Sanchez, Ernesto; Sinha, Arani; Turco, Vittorio. - ELETTRONICO. - (2025). ( IEEE VLSI Test Symposium 2025 Tempe, Arizona (USA) 28-30 April 2025) [10.1109/VTS65138.2025.11022869]. | 1-gen-2025 | Francesco AngionePaolo BernardiAnnachiara RuospoErnesto SanchezVittorio Turco + | VTS25___Special_Session.pdf; Special_Session_Trustworthy_Hardware-AI_at_the_Cloud.pdf |
| System-Level Test techniques for Automotive SoCs / Angione, Francesco; Bernardi, Paolo; Cantoro, Riccardo. - (2025), pp. 568-577. ( International Test Conference (ITC) San Diego, CA (USA) 20-26 September 2025) [10.1109/itc58126.2025.00093]. | 1-gen-2025 | Angione, FrancescoBernardi, PaoloCantoro, Riccardo | System-Level_Test_techniques_for_Automotive_SoCs.pdf |
| A 6-bit Low-Area Hybrid ADC Design For System-on-Chip Measurements / Bernardi, Paolo; Kolahimahmoudi, Nima; Insinga, Giorgio. - (2024). ( IEEE International conference on Design, Test & Technology of Integrated Systems (DTTIS) Aix-en-Provence (FR) 14-16 October 2024) [10.1109/DTTIS62212.2024.10780233]. | 1-gen-2024 | Bernardi, PaoloKolahimahmoudi, NimaInsinga, Giorgio | DTTIS24_6_pages.pdf; A_6-bit_Low-Area_Hybrid_ADC_Design_For_System-on-Chip_Measurements.pdf |
| A Flexible FPGA-based Test Equipment for Enabling Out-of-Production Manufacturing Test Flow of Digital Systems / Di Gruttola Giardino, Nicola; Angione, Francesco; Bernardi, Paolo; Foscale, Tommaso; Bertani And Vincenzo Tancorre, Claudia. - (2024). ( International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS) Didcot (UK) 08-10 October 2024) [10.1109/DFT63277.2024.10753536]. | 1-gen-2024 | Nicola di Gruttola GiardinoFrancesco AngionePaolo BernardiTommaso Foscale + | A_Flexible_FPGA-Based_Test_Equipment_for_Enabling_Out-of-Production_Manufacturing_Test_Flow_of_Digital_Systems.pdf |
| Built-In Self-Test Architecture Enabling Diagnosis for Massive Embedded Memory Banks in Large SoCs / Bernardi, Paolo; Guerriero, Augusto Maria; Insinga, Giorgio; Paganini, Giovanni; Carnevale, Giambattista; Coppetta, Matteo; Mischo, Walter; Ullmann, Rudolf. - In: ELECTRONICS. - ISSN 2079-9292. - 13:2(2024). [10.3390/electronics13020303] | 1-gen-2024 | Bernardi, PaoloInsinga, GiorgioPaganini, Giovanni + | electronics-13-00303.pdf |
| Exploring trade-offs in multi-site wafer testing / Bernardi, Paolo; Cardone, Lorenzo; Foscale, Tommaso. - (2024). ( 25th IEEE Latin American Test Symposium 2024 Maceio (BRA) 09-12 April 2024) [10.1109/lats62223.2024.10534596]. | 1-gen-2024 | Bernardi, PaoloCardone, LorenzoFoscale, Tommaso | Exploring_trade-offs_in_multi-site_wafer_testing.pdf |