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BERNARDI, PAOLO

BERNARDI, PAOLO  

Dipartimento di Automatica e Informatica  

012326  

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Citazione Data di pubblicazione Autori File
Smart Heuristics for Maximum Common Subgraph Sub-Estimation in Large Digital Circuits / Bernardi, Paolo; Cardone, Lorenzo; Quer, Stefano. - (In corso di stampa). (Intervento presentato al convegno IWLS 2025 tenutosi a Verona (IT) nel 20/05/2024 - 24/05/2024). In corso di stampa Bernardi,PaoloCardone,LorenzoQuer,Stefano -
A Comprehensive Scan Test Cost Model to Optimize the Production of very large SoCs / Iaria, Giusy; Bernardi, Paolo; Bertani, Claudia; Cardone, Lorenzo; Garozzo, Giuseppe; Tancorre, Vincenzo. - In: IEEE TRANSACTIONS ON COMPUTERS. - ISSN 0018-9340. - 74:4(2025), pp. 1278-1292. [10.1109/TC.2024.3521246] 1-gen-2025 Iaria, GiusyBernardi, PaoloCardone, Lorenzo + A_Comprehensive_Scan_Test_Cost_Model_to_Optimize_the_Production_of_Very_Large_SoCs.pdf
A Cost–Benefit Analysis of Multi-Site Wafer Testing / Foscale, Tommaso; Bernardi, Paolo. - In: ELECTRONICS. - ISSN 2079-9292. - 14:12(2025). [10.3390/electronics14122450] 1-gen-2025 Foscale, TommasoBernardi, Paolo A Cost–Benefit Analysis of Multi-Site Wafer Testing.pdf
A Novel Indirect Methodology based on Execution Traces for Grading Functional Test Programs / Angione, Francesco; Bernardi, Paolo; Calabrese, Andrea; Cardone, Lorenzo; Quer, Stefano; Bertani, Claudia; Tancorre, Vincenzo. - In: IEEE TRANSACTIONS ON COMPUTERS. - ISSN 0018-9340. - (2025), pp. 1-13. [10.1109/tc.2025.3600005] 1-gen-2025 Angione, FrancescoBernardi, PaoloCalabrese, AndreaCardone, LorenzoQuer, Stefano + A_Novel_Indirect_Methodology_based_on_Execution_Traces_for_Grading_Functional_Test_Programs.pdf
A System-Level Test Methodology for Communication Peripherals in System-on-Chips / Angione, Francesco; Bernardi, Paolo; Di Gruttola Giardino, Nicola; Filipponi, Gabriele; Bertani, Claudia; Tancorre, Vincenzo. - In: IEEE TRANSACTIONS ON COMPUTERS. - ISSN 0018-9340. - 74:2(2025), pp. 731-739. [10.1109/TC.2024.3500375] 1-gen-2025 Francesco AngionePaolo BernardiNicola di Gruttola GiardinoGabriele Filipponi + A_System-Level_Test_Methodology_for_Communication_Peripherals_in_System-on-Chips.pdf
Automatic Generation of System-Level Test for Un-Core Logic of Large Automotive SoC / Angione, Francesco; Bernardi, Paolo; Iaria, Giusy; Bertani, Claudia; Tancorre, Vincenzo. - In: IEEE TRANSACTIONS ON COMPUTERS. - ISSN 0018-9340. - 74:9(2025), pp. 3195-3209. [10.1109/tc.2025.3587515] 1-gen-2025 Angione, FrancescoBernardi, PaoloIaria, Giusy + Automatic_Generation_of_System-Level_Test_for_Un-Core_Logic_of_Large_Automotive_SoC.pdf
Enhancing Logic Diagnosis of field returns through Logic BIST in Automotive SoCs / Bernardi, Paolo; Filipponi, Gabriele; Iaria, Giusy; Bertani, Claudia; Tancorre, Vincenzo. - (2025). (Intervento presentato al convegno 2025 IEEE Latin American Test Symposium tenutosi a San Andres Islas (COL) nel 11-14 March 2025) [10.1109/LATS65346.2025.10963955]. 1-gen-2025 Paolo BernardiGabriele FilipponiGiusy Iaria + LATS_2025.pdf; Enhancing_Logic_Diagnosis_of_Field_Returns_Through_Logic_BIST_in_Automotive_SoCs.pdf
Extended design and linearity analysis of a 6-bit low-area hybrid ADC design for local system-on-chip measurements / Kolahimahmoudi, Nima; Insinga, Giorgio; Bernardi, Paolo. - In: MICROPROCESSORS AND MICROSYSTEMS. - ISSN 0141-9331. - 118:(2025). [10.1016/j.micpro.2025.105191] 1-gen-2025 Nima KolahimahmoudiGiorgio InsingaPaolo Bernardi 1-s2.0-S0141933125000584-main.pdf
From Structural Test Escapes to Silent Data Errors: A preliminary analysis / Angione, Francesco; Bernardi, Paolo; Sinha, Arani. - ELETTRONICO. - (2025). (Intervento presentato al convegno 2025 IEEE 9th International Test Conference India (ITC India) tenutosi a Bangalore (IND) nel 20-22 July 2025) [10.1109/ITCIndia66078.2025.11141623]. 1-gen-2025 Francesco AngionePaolo Bernardi + From_Structural_Test_Escapes_to_Silent_Data_Errors_A_Preliminary_Analysis.pdf
Leveraging ATE to optimize System-Level-Test for Multicore Automotive SoCs / Angione, Francesco; Bernardi, Paolo; Bertani, Claudia; Bertetto, Lorenzo; Cardone, Lorenzo; DI GRUTTOLA GIARDINO, Nicola; Quer, Stefano; Tancorre, Vincenzo. - (2025), pp. 1-6. (Intervento presentato al convegno Latin American Test Symposium tenutosi a San Andres Islas, Colombia nel 11-14 March 2025) [10.1109/LATS65346.2025.10963947]. 1-gen-2025 Francesco AngionePaolo BernardiLorenzo BertettoLorenzo CardoneNicola Di Gruttola GiardinoStefano Quer + Leveraging_ATE_to_Optimize_System-Level-Test_for_Multicore_Automotive_SoCs.pdf
Special Session: Trustworthy Hardware-AI at the Cloud / Angione, Francesco; Bernardi, Paolo; Bosio, Alberto; Dattatraya Dixit, Harish; Pappalardo, Salvatore; Ruospo, Annachiara; Sanchez, Ernesto; Sinha, Arani; Turco, Vittorio. - ELETTRONICO. - (2025). (Intervento presentato al convegno IEEE VLSI Test Symposium 2025 tenutosi a Tempe, Arizona (USA) nel 28-30 April 2025) [10.1109/VTS65138.2025.11022869]. 1-gen-2025 Francesco AngionePaolo BernardiAnnachiara RuospoErnesto SanchezVittorio Turco + VTS25___Special_Session.pdf; Special_Session_Trustworthy_Hardware-AI_at_the_Cloud.pdf
A 6-bit Low-Area Hybrid ADC Design For System-on-Chip Measurements / Bernardi, Paolo; Kolahimahmoudi, Nima; Insinga, Giorgio. - (2024). (Intervento presentato al convegno IEEE International conference on Design, Test & Technology of Integrated Systems (DTTIS) tenutosi a Aix-en-Provence (FR) nel 14-16 October 2024) [10.1109/DTTIS62212.2024.10780233]. 1-gen-2024 Bernardi, PaoloKolahimahmoudi, NimaInsinga, Giorgio DTTIS24_6_pages.pdf; A_6-bit_Low-Area_Hybrid_ADC_Design_For_System-on-Chip_Measurements.pdf
A Flexible FPGA-based Test Equipment for Enabling Out-of-Production Manufacturing Test Flow of Digital Systems / Di Gruttola Giardino, Nicola; Angione, Francesco; Bernardi, Paolo; Foscale, Tommaso; Bertani And Vincenzo Tancorre, Claudia. - (2024). (Intervento presentato al convegno International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS) tenutosi a Didcot (UK) nel 08-10 October 2024) [10.1109/DFT63277.2024.10753536]. 1-gen-2024 Nicola di Gruttola GiardinoFrancesco AngionePaolo BernardiTommaso Foscale + A_Flexible_FPGA-Based_Test_Equipment_for_Enabling_Out-of-Production_Manufacturing_Test_Flow_of_Digital_Systems.pdf
Built-In Self-Test Architecture Enabling Diagnosis for Massive Embedded Memory Banks in Large SoCs / Bernardi, Paolo; Guerriero, Augusto Maria; Insinga, Giorgio; Paganini, Giovanni; Carnevale, Giambattista; Coppetta, Matteo; Mischo, Walter; Ullmann, Rudolf. - In: ELECTRONICS. - ISSN 2079-9292. - 13:2(2024). [10.3390/electronics13020303] 1-gen-2024 Bernardi, PaoloInsinga, GiorgioPaganini, Giovanni + electronics-13-00303.pdf
Exploring trade-offs in multi-site wafer testing / Bernardi, Paolo; Cardone, Lorenzo; Foscale, Tommaso. - (2024). (Intervento presentato al convegno 25th IEEE Latin American Test Symposium 2024 tenutosi a Maceio (BRA) nel 09-12 April 2024) [10.1109/lats62223.2024.10534596]. 1-gen-2024 Bernardi, PaoloCardone, LorenzoFoscale, Tommaso Exploring_trade-offs_in_multi-site_wafer_testing.pdf
Logic Diagnosis Based on Logic Built-In Self-Test Signatures Collected In-Field from Failing System-on-Chips / Bernardi, Paolo; Filipponi, Gabriele; Iaria, Giusy; Bertani, Claudia; Tancorre, Vincenzo. - In: ELECTRONICS. - ISSN 2079-9292. - 13:21(2024). [10.3390/electronics13214234] 1-gen-2024 Paolo BernardiGabriele FilipponiGiusy Iaria + electronics-13-04234.pdf
Optimizing System-Level Test Program Generation via Genetic Programming / Schwachhofer, D.; Angione, F.; Becker, S.; Wagner, S.; Sauer, M.; Bernardi, P.; Polian, I.. - (2024). (Intervento presentato al convegno 2024 IEEE European Test Symposium (ETS) tenutosi a The Hague (NL) nel 20-24 May 2024) [10.1109/ETS61313.2024.10567817]. 1-gen-2024 Angione F.Bernardi P. + Optimizing_System-Level_Test_Program_Generation_via_Genetic_Programming.pdf
A guided debugger-based fault injection methodology for assessing functional test programs / Angione, Francesco; Bernardi, Paolo; Di Gruttola Giardino, Nicola; Appello, Davide; Bertani, Claudia; Tancorre, Vincenzo. - (2023), pp. 1-7. (Intervento presentato al convegno VLSI Test Symposium tenutosi a San Diego (USA) nel 24-26 April 2023) [10.1109/VTS56346.2023.10140099]. 1-gen-2023 Angione, FrancescoBernardi, PaoloDi Gruttola Giardino, Nicola + A_guided_debugger-based_fault_injection_methodology_for_assessing_functional_test_programs.pdf
A Low-Cost Burn-In Tester Architecture to supply Effective Electrical Stress / Angione, F.; Appello, D.; Bernardi, P.; Bertani, C.; Gallo, G.; Littardi, S.; Pollaccia, G.; Ruggeri, W.; Reorda, M. S.; Tancorre, V.; Ugioli, R.. - In: IEEE TRANSACTIONS ON COMPUTERS. - ISSN 0018-9340. - (2023), pp. 1447-1459. [10.1109/TC.2022.3199994] 1-gen-2023 Angione F.Bernardi P.Littardi S.Ruggeri W.Reorda M. S. + A_Low-Cost_Burn-In_Tester_Architecture_to_Supply_Effective_Electrical_Stress.pdf
A Novel Approach to Extract Embedded Memory Design Parameter Through Irradiation Test / Bernardi, Paolo; Kolahimahmoudi, Nima; Insinga, Giorgio. - (2023), pp. 1-6. (Intervento presentato al convegno Conference on Very Large Scale Integration (VLSI-SoC 2023) tenutosi a Dubai (United Arab Emirates) nel October 16 - 18, 2023) [10.1109/VLSI-SoC57769.2023.10321848]. 1-gen-2023 Bernardi, PaoloKolahimahmoudi, NimaInsinga, Giorgio A_Novel_Approach_to_Extract_Embedded_Memory_Design_Parameter_Through_Irradiation_Test.pdf; A_Novel_Approach_to_Extract_Embedded_Memory_Design_Parameter_Through_Irradiation_Test.pdf