In recent years, the increasing interest in space exploration has brought a significant change in the design of avionic systems. The growing complexity required a shift from using only low-performance, space-grade components to more performant Commercial Off-The-Shelf (COTS) components. These systems are, however, more susceptible to radiation-induced effects, and as such, require the engineers to implement advanced techniques of hardening-by-design or by software to increase the tolerance to Single Event Upset induced faults. Traditional scrubbing mechanisms for RAM with ECC encoding operate under the assumption that the entire memory space must be continuously checked for errors. However, this approach proves inefficient for complex space missions with varying mission scenarios, as it unnecessarily consumes resources by checking unused memory regions while potentially allowing errors to accumulate in critical areas. The need for more efficient error mitigation strategies becomes particularly crucial as space missions become more sophisticated and resource-constrained. This work proposes an innovative memory profiling-based scrubbing mechanism leveraging Hardware-Software Co-Design principles. Our approach introduces a specialized scrubber designed around the memory system, which interfaces with a register file accessible as a memory-mapped peripheral. The methodology involves a three-stage process: initial application compilation, memory profiling to determine occupation patterns, and application modification to program the register file with profiling results. This targeted approach ensures that only actively used memory regions are scrubbed, significantly improving efficiency while maintaining robust error protection in critical memory areas. The proposed solution offers a practical balance between system reliability and resource utilization, particularly valuable for modern space missions where optimizing both performance and radiation tolerance is essential.
HW/SW Co-Design of a Reliable Deep Space System exploiting Application-profiled RAM Scrubbing / Di Gruttola Giardino, Nicola; Bernardi, Paolo; Corpino, Sabrina; Stesina, Fabrizio. - (2025). ( 38th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems Barcelona (Spain) 21-23 October 2025) [10.1109/DFT66274.2025.11257434].
HW/SW Co-Design of a Reliable Deep Space System exploiting Application-profiled RAM Scrubbing
Nicola di Gruttola Giardino;Paolo Bernardi;Sabrina Corpino;Fabrizio Stesina
2025
Abstract
In recent years, the increasing interest in space exploration has brought a significant change in the design of avionic systems. The growing complexity required a shift from using only low-performance, space-grade components to more performant Commercial Off-The-Shelf (COTS) components. These systems are, however, more susceptible to radiation-induced effects, and as such, require the engineers to implement advanced techniques of hardening-by-design or by software to increase the tolerance to Single Event Upset induced faults. Traditional scrubbing mechanisms for RAM with ECC encoding operate under the assumption that the entire memory space must be continuously checked for errors. However, this approach proves inefficient for complex space missions with varying mission scenarios, as it unnecessarily consumes resources by checking unused memory regions while potentially allowing errors to accumulate in critical areas. The need for more efficient error mitigation strategies becomes particularly crucial as space missions become more sophisticated and resource-constrained. This work proposes an innovative memory profiling-based scrubbing mechanism leveraging Hardware-Software Co-Design principles. Our approach introduces a specialized scrubber designed around the memory system, which interfaces with a register file accessible as a memory-mapped peripheral. The methodology involves a three-stage process: initial application compilation, memory profiling to determine occupation patterns, and application modification to program the register file with profiling results. This targeted approach ensures that only actively used memory regions are scrubbed, significantly improving efficiency while maintaining robust error protection in critical memory areas. The proposed solution offers a practical balance between system reliability and resource utilization, particularly valuable for modern space missions where optimizing both performance and radiation tolerance is essential.| File | Dimensione | Formato | |
|---|---|---|---|
|
DFTS25_ECC_Methodologies_Camera_Ready_IEEE_Approved.pdf
accesso aperto
Tipologia:
2. Post-print / Author's Accepted Manuscript
Licenza:
Pubblico - Tutti i diritti riservati
Dimensione
1.24 MB
Formato
Adobe PDF
|
1.24 MB | Adobe PDF | Visualizza/Apri |
|
HW_SW_Co-Design_of_a_Reliable_Deep_Space_System_Exploiting_Application-Profiled_RAM_Scrubbing.pdf
accesso riservato
Tipologia:
2a Post-print versione editoriale / Version of Record
Licenza:
Non Pubblico - Accesso privato/ristretto
Dimensione
1.27 MB
Formato
Adobe PDF
|
1.27 MB | Adobe PDF | Visualizza/Apri Richiedi una copia |
Pubblicazioni consigliate
I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
https://hdl.handle.net/11583/3004452
