PORTO @ Archivio Istituzionale della Ricerca

PRINETTO, Paolo Ernesto
 Distribuzione geografica
Salva come PNG Salva come JPEG
Continente #
EU - Europa 132.141
NA - Nord America 52.036
AS - Asia 24.175
SA - Sud America 1.582
AF - Africa 477
OC - Oceania 35
Continente sconosciuto - Info sul continente non disponibili 17
Totale 210.463
Salva come PNG Salva come JPEG
Nazione #
IT - Italia 93.515
US - Stati Uniti d'America 51.495
FR - Francia 9.902
GB - Regno Unito 9.841
DE - Germania 7.312
SG - Singapore 7.119
CN - Cina 5.701
VN - Vietnam 4.380
RU - Federazione Russa 3.090
UA - Ucraina 2.336
NL - Olanda 1.617
HK - Hong Kong 1.378
KR - Corea 1.345
TR - Turchia 1.187
BR - Brasile 1.159
IE - Irlanda 759
IN - India 695
SE - Svezia 687
AT - Austria 596
FI - Finlandia 551
JP - Giappone 520
CH - Svizzera 484
CA - Canada 378
PK - Pakistan 237
IL - Israele 224
BE - Belgio 216
ID - Indonesia 183
PL - Polonia 173
JO - Giordania 163
ZA - Sudafrica 161
TH - Thailandia 153
TW - Taiwan 150
BD - Bangladesh 149
PH - Filippine 142
ES - Italia 137
RO - Romania 124
BG - Bulgaria 108
IQ - Iraq 108
VE - Venezuela 107
IR - Iran 104
MY - Malesia 104
PT - Portogallo 101
AR - Argentina 98
CL - Cile 83
MX - Messico 79
EU - Europa 78
SN - Senegal 75
AP - ???statistics.table.value.countryCode.AP??? 54
CZ - Repubblica Ceca 44
CI - Costa d'Avorio 43
DK - Danimarca 43
GR - Grecia 42
EC - Ecuador 38
EG - Egitto 38
SI - Slovenia 38
UZ - Uzbekistan 32
MA - Marocco 31
CO - Colombia 30
LT - Lituania 29
SK - Slovacchia (Repubblica Slovacca) 28
PY - Paraguay 27
AE - Emirati Arabi Uniti 26
SA - Arabia Saudita 26
AU - Australia 25
DZ - Algeria 25
EE - Estonia 24
TN - Tunisia 24
AZ - Azerbaigian 23
MD - Moldavia 23
KE - Kenya 22
BY - Bielorussia 21
NP - Nepal 19
HR - Croazia 18
JM - Giamaica 15
KZ - Kazakistan 15
PE - Perù 15
HU - Ungheria 14
NG - Nigeria 14
AL - Albania 12
BO - Bolivia 12
CR - Costa Rica 11
ET - Etiopia 11
PA - Panama 11
GT - Guatemala 10
LV - Lettonia 10
AM - Armenia 9
DO - Repubblica Dominicana 9
GH - Ghana 9
KG - Kirghizistan 9
PS - Palestinian Territory 9
SY - Repubblica araba siriana 9
KW - Kuwait 8
LB - Libano 8
LU - Lussemburgo 8
NZ - Nuova Zelanda 8
UY - Uruguay 8
NO - Norvegia 7
RS - Serbia 7
AO - Angola 6
OM - Oman 6
Totale 210.367
Salva come PNG Salva come JPEG
Città #
Torino 82.728
Ashburn 11.605
Southend 8.987
Seattle 5.017
Singapore 3.893
Fairfield 3.804
Turin 2.030
San Jose 2.003
Woodbridge 1.871
Houston 1.577
Chandler 1.530
Boardman 1.442
Cambridge 1.417
Wilmington 1.325
Des Moines 1.265
Hong Kong 1.197
Milan 1.184
Santa Clara 1.115
Ho Chi Minh City 1.113
Jacksonville 1.106
Ann Arbor 1.075
Hanoi 1.072
Buffalo 1.048
Princeton 1.041
Beijing 845
Izmir 715
Dublin 706
San Ramon 676
Berlin 635
Saint Petersburg 627
Shanghai 604
Herkenbosch 600
San Francisco 593
Chicago 586
Dallas 572
Zhengzhou 515
Hefei 480
Helsinki 472
Seoul 468
Hangzhou 465
Lauterbourg 452
Los Angeles 432
Bern 415
San Donato Milanese 371
North Bergen 342
Tokyo 335
New York 326
Moscow 324
Amsterdam 287
Baltimore 280
Zaporozhye 279
Pennsylvania Furnace 275
Council Bluffs 272
Rome 257
Nuremberg 250
Istanbul 249
Tongling 243
Monopoli 223
Mountain View 222
Overberg 218
Vienna 214
Da Nang 199
Haiphong 196
Norwalk 195
Las Vegas 189
San Diego 187
Frankfurt am Main 152
Jakarta 149
Brussels 147
Jerusalem 147
Padua 143
Frankfurt 141
Paris 140
Fremont 138
University Park 138
Borgaro Torinese 134
Guangzhou 134
Groningen 132
Redwood City 131
London 116
Phoenix 114
Malatya 111
Bologna 102
Indiana 102
Muizenberg 102
São Paulo 101
Ottawa 98
Toronto 98
Austin 97
Shenzhen 92
The Dalles 89
Clearwater 86
Falls Church 83
Seongnam 83
Melun 82
Dearborn 81
La Jolla 76
Munich 76
Columbus 75
Lisbon 74
Totale 161.000
Salva come PNG Salva come JPEG
Nome #
Genetic Defect Based March Test Generation for SRAM 1.367
"Plug & Test" at System Level via Testable TLM Primitives 1.292
An area-efficient 2-D convolution implementation on FPGA for space applications 1.042
Reti Logiche (Esercizi commentati e risolti) 1.035
A Web Based Platform for Sign Language Corpus Creation 1.026
On-line testing of an off-the-shelf microprocessor board for safety-critical applications 1.018
Programmable built-in self-testing of embedded RAM clusters in system-on-chip architectures 1.011
Control-flow checking via regular expressions 1.003
Software-Based Self-Test of Set-Associative Cache Memories 997
FAUST: fault-injection script-based tool 984
A Unique March Test Algorithm for the Wide Spread of Realistic Memory Faults in SRAMs 979
SEU effect analysis in a open-source router via a distributed fault injection environment 970
The use of model checking in ATPG for sequential circuits 969
Single-Event Upset Analysis and Protection in High Speed Circuits 964
A programmable BIST architecture for clusters of Multiple-Port SRAMs 947
ABLUR: An FPGA-based adaptive deblurring core for real-time applications 947
AIDI: An adaptive image denoising FPGA-based IP-core for real-time applications 946
March Test Generation Revealed 942
An On-line BIST RAM Architecture with Self Repair Capabilities 942
EXFI: a low cost Fault Injection System for embedded Microprocessor-based Boards 934
A cloud-based Cyber-Physical System for environmental monitoring 933
Flash-memories in Space Applications: Trends and Challenges 932
Validation of a software dependability tool via fault injection experiments 929
On integrating a proprietary and a commercial architecture for optimal BIST performances in SoCs 927
March AB, March AB1: new March tests for unlinked dynamic memory faults 924
SAFE: a Self Adaptive Frame Enhancer FPGA-based IP-core for real-time space applications 920
Static analysis of SEU effects on software applications 919
Data criticality estimation in software applications 918
An optimal algorithm for the automatic generation of March tests 913
Design and Optimization of Adaptable BCH Codecs for NAND Flash Memories 909
Test engineering education in Europe: the EuNICE-Test project 906
'BOND': An Interposition Agents Based Fault Injector for Windows NT 903
An effective distributed BIST architecture for RAMs 903
ATPG for Dynamic Burn-In Test in Full-Scan Circuits 903
Software dependability techniques validated via fault injection experiments 898
A watchdog processor to detect data and control flow errors 896
Digital, memory and mixed-signal test engineering education: five centres of competence in Europe 895
Online and Offline BIST in IP-Core Design 892
FLARE: A design environment for FLASH-based space applications 892
Automating the IEEE std. 1500 compliance verification for embedded cores 892
Memory Fault Simulator for Static-Linked Faults 891
NBTI Mitigation by Dynamic Partial Reconfiguration 888
A novel methodology to increase fault tolerance in autonomous FPGA-based systems 886
Testing Embedded Memories in Telecommunication Systems 881
Microprocessor fault-tolerance via on-the-fly partial reconfiguration 877
Performance and Reliability Analysis of Cross-Layer Optimizations of NAND Flash Controllers 876
Ef3S: An evaluation framework for flash-based systems 875
Automatic March tests generation for multi-port SRAMs 873
Automatic March tests generation for static and dynamic faults in SRAMs 872
A FPGA-Based Reconfigurable Software Architecture for Highly Dependable Systems 871
IEEE Standard 1500 Compliance Verification for Embedded Cores 867
MarciaTesta: An Automatic Generator of Test Programs for Microprocessors' Data Caches 866
SA-FEMIP: A Self-Adaptive Features Extractor and Matcher IP-Core Based on Partially Reconfigurable FPGAs for Space Applications 865
Increasing the robustness of CUDA Fermi GPU-based systems 861
A 22n March Test for Realistic Static Linked Faults in SRAMs 861
Applying March Tests to K-Way Set-Associative Cache Memories 860
A PVM tool for automatic test generation on parallel and distributed systems 859
Design Issues and Challenges of File Systems for Flash Memories 858
A parallel genetic algorithm for Automatic Generation of Test Sequences for digital circuits 856
Memory read faults: taxonomy and automatic test generation 854
March AB, a State-of-the-Art March Test for Realistic Static Linked Faults and Dynamic Faults in SRAMs 854
ZipStream: improving dependability in Dynamic Partial Reconfiguration 851
Influence of parasitic capacitance variations on 65 nm and 32 nm predictive technology model SRAM core-cells 850
A methodology for system-level design for verifiability 850
Analysis of System-Failure Rate Caused by Soft-Errors using a UML-Based Systematic Methodology in an SoC 849
A software-based self test of CUDA Fermi GPUs 843
SSDExplorer: a Virtual Platform for Fine-Grained Design Space Exploration of Solid State Drives 842
Efficient Multi-level Fault Simulation of HW/SW Systems for Structural Faults 842
Online self-repair of FIR filters 837
System Level Testing via TLM 2.0 Debug Transport Interface 837
A cross-layer approach for new reliability-performance trade-offs in MLC NAND flash memories 836
A Systematic Approach for Evaluating Satellite Communications Systems 833
SSDExplorer: A Virtual Platform for Performance/Reliability-Oriented Fine-Grained Design Space Exploration of Solid State Drives 829
Language Resources for Computer Assisted Translation from Italian to Italian Sign Language of Deaf People 828
Dependable Dynamic Partial Reconfiguration with minimal area & time overheads on Xilinx FPGAS 828
DFT and BIST of a multichip module for high-energy physics experiments 828
A High-level EDA Environment for the Automatic Insertion of HD-BIST Structures 828
Automatic March Tests Generations for Static Linked Faults in SRAMs 825
EDACs and test integration strategies for NAND flash memories 823
Using ER Models for Microprocessor Functional Test Coverage Evaluation 821
A portable open-source controller for safe Dynamic Partial Reconfiguration on Xilinx FPGAs 819
On applying the set covering model to reseeding 815
Power-aware voltage tuning for STT-MRAM reliability 814
Integrating MultiWordNet with Italian Sign Language lexical resources 812
Exploiting competing subpopulations for automatic generation of test sequences for digital circuits 811
Test exploration and validation using transaction level models 805
A unifying formalism to support automated synthesis of SBSTs for embedded caches 804
Automated Synthesis of SEU Tolerant Architectures from OO Descriptions 803
FLARES: an aging aware algorithm to autonomously adapt the error correction capability in NAND Flash memories 801
Fault mitigation strategies for CUDA GPUs 800
A novel algorithm and hardware architecture for fast video-based shape reconstruction of space debris 795
A Self-Repairing Execution Unit for Microprogrammed Processors 793
FEMIP: A high performance FPGA-based features extractor & matcher for space applications 790
ADAGE: An Automated Synthesis tool for Adaptive BCH-based ECC IP-Cores 788
Side-channel analysis of SEcube™ platform 784
Specification and design of a new memory fault simulator 784
Efficient Simulation of Structural Faults for the Reliability Evaluation at System-Level 780
Automating defects simulation and fault modeling for SRAMs 775
Integration of STT-MRAM model into CACTI simulator 772
On Enhancing Fault Injection's Capabilities and Performances for Safety Critical Systems 771
Totale 88.566
Salva come PNG Salva come JPEG
Categoria #
all - tutte 393.302
article - articoli 74.864
book - libri 5.315
conference - conferenze 309.227
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 3.896
Totale 786.604
Salva come PNG Salva come JPEG


Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/2021311 0 0 0 0 0 0 0 0 0 0 0 311
2021/20226.020 250 460 176 494 298 669 550 356 339 530 988 910
2022/20237.557 608 952 281 664 712 838 1.460 311 661 100 373 597
2023/20242.320 157 177 119 178 255 397 105 145 74 116 279 318
2024/202510.429 306 1.173 376 993 790 710 475 878 1.498 629 1.046 1.555
2025/202623.958 1.219 1.061 1.240 1.561 1.689 1.735 3.526 2.020 4.532 3.087 836 1.452
Totale 211.367