PORTO @ Archivio Istituzionale della Ricerca

PRINETTO, Paolo Ernesto
 Distribuzione geografica
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Continente #
EU - Europa 126.861
NA - Nord America 44.098
AS - Asia 6.495
AF - Africa 264
SA - Sud America 210
OC - Oceania 21
Continente sconosciuto - Info sul continente non disponibili 12
Totale 177.961
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Nazione #
IT - Italia 92.412
US - Stati Uniti d'America 43.849
GB - Regno Unito 9.687
FR - Francia 9.285
DE - Germania 6.807
CN - Cina 2.858
UA - Ucraina 2.304
NL - Olanda 1.414
RU - Federazione Russa 1.408
TR - Turchia 911
SG - Singapore 872
IE - Irlanda 739
KR - Corea 681
SE - Svezia 662
CH - Svizzera 456
FI - Finlandia 406
IN - India 261
CA - Canada 228
PK - Pakistan 196
BE - Belgio 186
AT - Austria 164
JO - Giordania 143
JP - Giappone 143
PL - Polonia 120
RO - Romania 114
ZA - Sudafrica 112
BG - Bulgaria 105
HK - Hong Kong 96
IR - Iran 91
MY - Malesia 88
VE - Venezuela 83
EU - Europa 78
ES - Italia 77
SN - Senegal 64
VN - Vietnam 63
CL - Cile 56
AP - ???statistics.table.value.countryCode.AP??? 54
TW - Taiwan 54
BR - Brasile 46
CZ - Repubblica Ceca 37
IL - Israele 35
SI - Slovenia 34
DK - Danimarca 32
GR - Grecia 31
EG - Egitto 27
SK - Slovacchia (Repubblica Slovacca) 27
EE - Estonia 23
PT - Portogallo 22
BY - Bielorussia 20
TH - Thailandia 18
MD - Moldavia 17
AR - Argentina 16
ID - Indonesia 14
AE - Emirati Arabi Uniti 13
AU - Australia 13
HR - Croazia 13
DZ - Algeria 11
MX - Messico 10
NG - Nigeria 10
GH - Ghana 9
KZ - Kazakistan 9
AZ - Azerbaigian 8
HU - Ungheria 8
LU - Lussemburgo 8
PH - Filippine 8
TN - Tunisia 8
MA - Marocco 7
NO - Norvegia 7
NZ - Nuova Zelanda 7
AL - Albania 6
CI - Costa d'Avorio 5
CO - Colombia 5
GT - Guatemala 5
LV - Lettonia 5
SA - Arabia Saudita 5
ET - Etiopia 4
KE - Kenya 4
LT - Lituania 4
PS - Palestinian Territory 4
SY - Repubblica araba siriana 4
CR - Costa Rica 3
AM - Armenia 2
GE - Georgia 2
MT - Malta 2
PA - Panama 2
PE - Perù 2
QA - Qatar 2
SC - Seychelles 2
UY - Uruguay 2
UZ - Uzbekistan 2
BD - Bangladesh 1
BH - Bahrain 1
CY - Cipro 1
IM - Isola di Man 1
IQ - Iraq 1
KG - Kirghizistan 1
KW - Kuwait 1
MO - Macao, regione amministrativa speciale della Cina 1
PR - Porto Rico 1
RS - Serbia 1
Totale 177.957
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Città #
Torino 82.729
Ashburn 10.742
Southend 8.987
Seattle 5.009
Fairfield 3.803
Woodbridge 1.870
Turin 1.764
Houston 1.557
Chandler 1.530
Cambridge 1.417
Wilmington 1.324
Boardman 1.300
Des Moines 1.263
Jacksonville 1.101
Ann Arbor 1.075
Princeton 1.041
Milan 963
Buffalo 937
Izmir 714
Dublin 689
San Ramon 676
Berlin 627
Saint Petersburg 627
Singapore 623
Herkenbosch 600
Shanghai 566
San Francisco 563
Chicago 562
Zhengzhou 500
Hangzhou 456
Beijing 447
Bern 415
Helsinki 382
San Donato Milanese 371
San Jose 301
Zaporozhye 279
Pennsylvania Furnace 275
Baltimore 268
Amsterdam 261
Monopoli 223
Mountain View 222
Overberg 218
New York 202
Norwalk 194
Las Vegas 186
San Diego 185
Dallas 173
Rome 169
Vienna 144
Frankfurt 141
Padua 139
Fremont 138
University Park 138
Borgaro Torinese 134
Council Bluffs 132
Redwood City 131
Brussels 118
Malatya 111
Paris 106
Moscow 103
Indiana 102
Muizenberg 102
Santa Clara 99
Guangzhou 98
Seoul 95
Austin 94
Phoenix 92
Bologna 88
Clearwater 86
Ottawa 85
Falls Church 83
Seongnam 83
Melun 82
Dearborn 81
La Jolla 76
Shenzhen 75
London 73
Lecce 72
Henderson 62
Verona 60
Caracas 58
Toronto 58
Los Angeles 57
Galati 56
Andover 55
Cedar Rapids 53
Kornik 53
Dong Ket 52
Washington 52
Atlanta 51
Nürnberg 50
Naples 49
Bremen 47
Nanjing 45
Riva 44
Alba 43
Lviv 40
Osaka 40
Columbus 39
Kwai Chung 39
Totale 144.590
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Nome #
Genetic Defect Based March Test Generation for SRAM 1.153
"Plug & Test" at System Level via Testable TLM Primitives 986
On-line testing of an off-the-shelf microprocessor board for safety-critical applications 928
A Web Based Platform for Sign Language Corpus Creation 911
The use of model checking in ATPG for sequential circuits 882
Reti Logiche (Esercizi commentati e risolti) 878
Programmable built-in self-testing of embedded RAM clusters in system-on-chip architectures 867
An area-efficient 2-D convolution implementation on FPGA for space applications 842
Control-flow checking via regular expressions 836
SEU effect analysis in a open-source router via a distributed fault injection environment 824
Software-Based Self-Test of Set-Associative Cache Memories 820
FAUST: fault-injection script-based tool 818
An On-line BIST RAM Architecture with Self Repair Capabilities 811
A cloud-based Cyber-Physical System for environmental monitoring 803
EXFI: a low cost Fault Injection System for embedded Microprocessor-based Boards 797
AIDI: An adaptive image denoising FPGA-based IP-core for real-time applications 792
Single-Event Upset Analysis and Protection in High Speed Circuits 789
A programmable BIST architecture for clusters of Multiple-Port SRAMs 788
Static analysis of SEU effects on software applications 786
On integrating a proprietary and a commercial architecture for optimal BIST performances in SoCs 785
ABLUR: An FPGA-based adaptive deblurring core for real-time applications 784
Validation of a software dependability tool via fault injection experiments 780
An optimal algorithm for the automatic generation of March tests 779
Design and Optimization of Adaptable BCH Codecs for NAND Flash Memories 776
Data criticality estimation in software applications 776
A PVM tool for automatic test generation on parallel and distributed systems 776
Automating the IEEE std. 1500 compliance verification for embedded cores 775
FLARE: A design environment for FLASH-based space applications 773
A Unique March Test Algorithm for the Wide Spread of Realistic Memory Faults in SRAMs 772
March AB, March AB1: new March tests for unlinked dynamic memory faults 771
March Test Generation Revealed 767
Software dependability techniques validated via fault injection experiments 763
A parallel genetic algorithm for Automatic Generation of Test Sequences for digital circuits 757
Ef3S: An evaluation framework for flash-based systems 756
A FPGA-Based Reconfigurable Software Architecture for Highly Dependable Systems 756
Online and Offline BIST in IP-Core Design 753
Applying March Tests to K-Way Set-Associative Cache Memories 753
SAFE: a Self Adaptive Frame Enhancer FPGA-based IP-core for real-time space applications 752
Flash-memories in Space Applications: Trends and Challenges 752
Test engineering education in Europe: the EuNICE-Test project 751
Testing Embedded Memories in Telecommunication Systems 751
A watchdog processor to detect data and control flow errors 748
An effective distributed BIST architecture for RAMs 747
Design Issues and Challenges of File Systems for Flash Memories 746
IEEE Standard 1500 Compliance Verification for Embedded Cores 745
ATPG for Dynamic Burn-In Test in Full-Scan Circuits 744
A methodology for system-level design for verifiability 740
Microprocessor fault-tolerance via on-the-fly partial reconfiguration 739
A portable open-source controller for safe Dynamic Partial Reconfiguration on Xilinx FPGAs 736
Digital, memory and mixed-signal test engineering education: five centres of competence in Europe 727
SSDExplorer: a Virtual Platform for Fine-Grained Design Space Exploration of Solid State Drives 727
Performance and Reliability Analysis of Cross-Layer Optimizations of NAND Flash Controllers 724
Automatic March tests generation for static and dynamic faults in SRAMs 724
System Level Testing via TLM 2.0 Debug Transport Interface 724
Memory read faults: taxonomy and automatic test generation 722
MarciaTesta: An Automatic Generator of Test Programs for Microprocessors' Data Caches 721
Exploiting competing subpopulations for automatic generation of test sequences for digital circuits 720
Online self-repair of FIR filters 719
NBTI Mitigation by Dynamic Partial Reconfiguration 719
ZipStream: improving dependability in Dynamic Partial Reconfiguration 717
A novel methodology to increase fault tolerance in autonomous FPGA-based systems 716
Language Resources for Computer Assisted Translation from Italian to Italian Sign Language of Deaf People 715
Increasing the robustness of CUDA Fermi GPU-based systems 715
On applying the set covering model to reseeding 714
Using ER Models for Microprocessor Functional Test Coverage Evaluation 713
Test exploration and validation using transaction level models 709
Influence of parasitic capacitance variations on 65 nm and 32 nm predictive technology model SRAM core-cells 706
Analysis of System-Failure Rate Caused by Soft-Errors using a UML-Based Systematic Methodology in an SoC 706
Memory Fault Simulator for Static-Linked Faults 705
A cross-layer approach for new reliability-performance trade-offs in MLC NAND flash memories 705
A software-based self test of CUDA Fermi GPUs 704
DFT and BIST of a multichip module for high-energy physics experiments 703
Integrating MultiWordNet with Italian Sign Language lexical resources 701
Automatic March tests generation for multi-port SRAMs 700
SSDExplorer: A Virtual Platform for Performance/Reliability-Oriented Fine-Grained Design Space Exploration of Solid State Drives 699
SA-FEMIP: A Self-Adaptive Features Extractor and Matcher IP-Core Based on Partially Reconfigurable FPGAs for Space Applications 698
A High-level EDA Environment for the Automatic Insertion of HD-BIST Structures 698
A Self-Repairing Execution Unit for Microprogrammed Processors 697
A 22n March Test for Realistic Static Linked Faults in SRAMs 697
Automated Synthesis of SEU Tolerant Architectures from OO Descriptions 696
EDACs and test integration strategies for NAND flash memories 695
March AB, a State-of-the-Art March Test for Realistic Static Linked Faults and Dynamic Faults in SRAMs 691
Power-aware voltage tuning for STT-MRAM reliability 690
Fault mitigation strategies for CUDA GPUs 687
Efficient Multi-level Fault Simulation of HW/SW Systems for Structural Faults 683
TLM 2.0 simple sockets synthesis to RTL 682
Automatic March Tests Generations for Static Linked Faults in SRAMs 679
Specification and design of a new memory fault simulator 675
Automating defects simulation and fault modeling for SRAMs 667
A Low-Cost FPGA-Based Test and Diagnosis Architecture for SRAMs 667
Test infrastructures evaluation at transaction level 664
Integration of STT-MRAM model into CACTI simulator 664
A unifying formalism to support automated synthesis of SBSTs for embedded caches 661
On Enhancing Fault Injection's Capabilities and Performances for Safety Critical Systems 660
Towards microagent based DBIST/DBISR 659
Side-channel analysis of SEcube™ platform 659
A Fault Injection Methodology and Infrastructure for Fast Single Event Upsets Emulation on Xilinx SRAM-based FPGAs 656
FLARES: an aging aware algorithm to autonomously adapt the error correction capability in NAND Flash memories 655
A novel algorithm and hardware architecture for fast video-based shape reconstruction of space debris 655
ADAGE: An Automated Synthesis tool for Adaptive BCH-based ECC IP-Cores 654
Totale 74.558
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Categoria #
all - tutte 308.850
article - articoli 58.699
book - libri 4.324
conference - conferenze 242.694
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 3.133
Totale 617.700
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2019/20209.254 0 0 0 1.634 1.384 1.352 1.087 1.322 1.319 565 361 230
2020/20218.973 868 1.085 521 1.491 1.155 1.090 405 562 389 657 439 311
2021/20226.020 250 460 176 494 298 669 550 356 339 530 988 910
2022/20237.557 608 952 281 664 712 838 1.460 311 661 100 373 597
2023/20242.320 157 177 119 178 255 397 105 145 74 116 279 318
2024/20251.879 306 1.173 376 24 0 0 0 0 0 0 0 0
Totale 178.860