Multiport memories are widely used as embedded cores in all communication system-on-chip devices. Due to their high complexity and very low accessibility, built-in self-test (BIST) is the most common solution implemented to test the different memories embedded in the system. This article presents a programmable BIST architecture based on a single microprogrammable BIST processor and a set of memory wrappers designed to simplify the test of a system containing a large number of distributed multiport memories of different sizes (number of bits, number of words), access protocols (asynchronous, synchronous), and timing.
Programmable built-in self-testing of embedded RAM clusters in system-on-chip architectures / Benso, Alfredo; DI CARLO, Stefano; DI NATALE, Giorgio; Lobetti Bodoni, M.; Prinetto, Paolo Ernesto. - In: IEEE COMMUNICATIONS MAGAZINE. - ISSN 0163-6804. - STAMPA. - 41:9(2003), pp. 90-97. [10.1109/MCOM.2003.1232242]
Titolo: | Programmable built-in self-testing of embedded RAM clusters in system-on-chip architectures | |
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Data di pubblicazione: | 2003 | |
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Digital Object Identifier (DOI): | http://dx.doi.org/10.1109/MCOM.2003.1232242 | |
Appare nelle tipologie: | 1.1 Articolo in rivista |
File in questo prodotto:
File | Descrizione | Tipologia | Licenza | |
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2003-MCOM-RAMDist-AuthorVersion.pdf | Manuscript author version | 2. Post-print / Author's Accepted Manuscript | PUBBLICO - Tutti i diritti riservati | Visibile a tuttiVisualizza/Apri |
2003-MCOM-RAMDist.pdf | 2. Post-print / Author's Accepted Manuscript | PUBBLICO - Tutti i diritti riservati | Visibile a tuttiVisualizza/Apri |
http://hdl.handle.net/11583/1404469