Embedded microprocessor cache memories suffer from limited observability and controllability creating problems during in-system test. The application of test algorithms for SRAM memories to cache memories thus requires opportune transformations. In this paper we present a procedure to adapt traditional march tests to testing the data and the directory array of k-way set-associative cache memories with LRU replacement. The basic idea is to translate each march test operation into an equivalent sequence of cache operations able to reproduce the desired marching sequence into the data and the directory array of the cache.

Applying March Tests to K-Way Set-Associative Cache Memories / Alpe, Simone; DI CARLO, Stefano; Prinetto, Paolo Ernesto; Savino, Alessandro. - STAMPA. - (2008), pp. 77-83. ((Intervento presentato al convegno IEEE 13th European Test Symposium (ETS) tenutosi a Verbania, IT nel 25-29 May 2008 [10.1109/ETS.2008.25].

Applying March Tests to K-Way Set-Associative Cache Memories

ALPE, SIMONE;DI CARLO, STEFANO;PRINETTO, Paolo Ernesto;SAVINO, ALESSANDRO
2008

Abstract

Embedded microprocessor cache memories suffer from limited observability and controllability creating problems during in-system test. The application of test algorithms for SRAM memories to cache memories thus requires opportune transformations. In this paper we present a procedure to adapt traditional march tests to testing the data and the directory array of k-way set-associative cache memories with LRU replacement. The basic idea is to translate each march test operation into an equivalent sequence of cache operations able to reproduce the desired marching sequence into the data and the directory array of the cache.
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11583/1845184
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