In spite of the mature cell structure, the memory controller architecture of Multi-level cell (MLC) NAND Flash memories is evolving fast in an attempt to improve the uncorrected/miscorrected bit error rate (UBER) and to provide a more flexible usage model where the performance-reliability trade-off point can be adjusted at runtime. However, optimization techniques in the memory controller architecture cannot avoid a strict trade-off between UBER and read throughput. In this paper, we show that co-optimizing ECC architecture configuration in the memory controller with program algorithm selection at the technology layer, a more flexible memory sub-system arises, which is capable of unprecedented trade-offs points between performance and reliability.

A cross-layer approach for new reliability-performance trade-offs in MLC NAND flash memories / Zambelli, C.; Indaco, Marco; Fabiano, Michele; Di Carlo, Stefano; Prinetto, Paolo Ernesto; Olivo, P.; Bertozzi, D.. - ELETTRONICO. - (2012), pp. 881-886. ((Intervento presentato al convegno Design, Automation and Test in Europe, Conference and Exhibition (DATE) tenutosi a Dresden, DE nel 12-16 March 2012 [10.1109/DATE.2012.6176622].

A cross-layer approach for new reliability-performance trade-offs in MLC NAND flash memories

INDACO, MARCO;FABIANO, MICHELE;DI CARLO, STEFANO;PRINETTO, Paolo Ernesto;
2012

Abstract

In spite of the mature cell structure, the memory controller architecture of Multi-level cell (MLC) NAND Flash memories is evolving fast in an attempt to improve the uncorrected/miscorrected bit error rate (UBER) and to provide a more flexible usage model where the performance-reliability trade-off point can be adjusted at runtime. However, optimization techniques in the memory controller architecture cannot avoid a strict trade-off between UBER and read throughput. In this paper, we show that co-optimizing ECC architecture configuration in the memory controller with program algorithm selection at the technology layer, a more flexible memory sub-system arises, which is capable of unprecedented trade-offs points between performance and reliability.
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11583/2462376