Archivio Istituzionale della RicercaSANCHEZ SANCHEZ, EDGAR ERNESTO
SANCHEZ SANCHEZ, EDGAR ERNESTO
Dipartimento di Automatica e Informatica
Sanchez, Ernesto; E. Sanchez; Sanchez E.; Ernesto Sanchez; SANCHEZ EDGAR; SANCHEZ E.; SANCHEZ SANCHEZ EDGAR ERNESTO; SANCHEZ SANCHEZ E.
012684
Power Side-Channel Analysis of the CVA6 RISC-V Core at the RTL Level Using VeriSide
In corso di stampa Farnaghinejad, Behnam; Porsia, Antonio; Ruospo, Annachiara; Savino, Alessandro; Di Carlo, Stefano; Sanchez, Ernesto
Reliability Assessment of QNN Functional Units deployed in RISC-V based systems
In corso di stampa Perlo, Giacomo; Porsia, Antonio; Ruospo, Annachiara; Sanchez, Ernesto
Advances in Testing and Reliability Benchmarks
2026 Angione, Francesco; Bernardi, Paolo; Giardino, Nicola Di Gruttola; Filipponi, Gabriele; Iaria, Giusy; Perlo, Giacomo; Pomeranz, Irith; Porsia, Antonio; Ruospo, Annachiara; Sanchez, Ernesto; Turco, Vittorio
Case Study: Integrating RISC-V Zicfiss Shadow Stack Support for Control-Flow Integrity on the CVA6 Processor
2026 Farnaghinejad, Behnam; Sanchez, Ernesto
Deep Learning-Based Power Side-Channel Evaluation from RTL Switching-Activity Proxies
2026 Farnaghinejad, Behnam; Ruospo, Annachiara; Savino, Alessandro; Di Carlo, Stefano; Sanchez, Ernesto
Emulating SDC-1 Hardware Faults Through Application Level Bit-Flip Injections in QNNs
2026 Perlo, Giacomo; Porsia, Antonio; Ruospo, Annachiara; Sanchez, Ernesto
Vectorized in-Place CRC: a Zero Memory-Overhead Fault Detection Scheme for QNNs on RISC-V
2026 Perlo, G.; Ruospo, A.; Sanchez, E.
VeriSide-II: Structure-Aware Power Modeling for Side-Channel Analysis at Register Transfer Level
2026 Farnaghinejad, Behnam; Ruospo, Annachiara; Savino, Alessandro; Di Carlo, Stefano; Sanchez, Ernesto
APSS Metrics for Fault Detection: Area, Position, Symmetry, and Shape in Image Segmentation
2025 Turco, Vittorio; Fezza, Lorenzo; Ruospo, Annachiara; Sanchez, Ernesto; Sonza Reorda, Matteo
Bi-LORD: Bit-Wise Low-Cost Real Numbers Dependability Assessment in AI Applications
2025 Azziz, Julia; Ruospo, Annachiara; Sanchez, Ernesto; Acle, Julio Pérez
DEAR-CNN: Data-Efficient Assessment of Resiliency in Convolutional Neural Networks
2025 Bellarmino, Nicolo'; Bosio, Alberto; Cantoro, Riccardo; Ruospo, Annachiara; Sanchez, Ernesto
DOC: Detection of On-Line Failures in CNNs
2025 Turco, Vittorio; Bellarmino, Nicolò; Ruospo, Annachiara; Cantoro, Riccardo; Sanchez, Ernesto
Image Test Libraries for the in-field test of ultra-low-power devices
2025 Porsia, Antonio; Perlo, Giacomo; Ruospo, Annachiara; Sanchez, Ernesto
Investigating on Gradient Regularization for Testing Neural Networks
2025 Bellarmino, Nicolo; Bosio, Alberto; Cantoro, Riccardo; Ruospo, Annachiara; Sanchez, Ernesto; Squillero, Giovanni
Late Contribution: VeriSide: A Modified Verilator for Leakage Assessment at the RTL Level
2025 Farnaghinejad, Behnam; Porsia, Antonio; Ruospo, Annachiara; Savino, Alessandro; Di Carlo, Stefano; Sanchez, Ernesto
On the resilience of INT8 Quantized Neural Networks on Low-Power RISC-V Devices
2025 Porsia, Antonio; Perlo, Giacomo; Ruospo, Annachiara; Sanchez, Ernesto
Power Side-Channel Vulnerabilities of a RISC-V Cryptography Accelerator Integrated into CVA6 via Core-V eXtension Interface (CV-X-IF)
2025 Farnaghinejad, Behnam; Bellizia, Davide; Dolmeta, Alessandra; Masera, Guido; Porsia, Antonio; Ruospo, Annachiara; Di Carlo, Stefano; Savino, Alessandro; Sanchez, Ernesto
Special Session: Trustworthy Hardware-AI at the Cloud
2025 Angione, Francesco; Bernardi, Paolo; Bosio, Alberto; Dattatraya Dixit, Harish; Pappalardo, Salvatore; Ruospo, Annachiara; Sanchez, Ernesto; Sinha, Arani; Turco, Vittorio
AI Eye Charts: measuring the visual acuity of Neural Networks with test images
2024 Porsia, Antonio; Ruospo, Annachiara; Sanchez, Ernesto
An Integrated Environment for the Reliability Assessment of CNNs Accelerators Implemented in FPGAs
2024 Mesa, Luis Ariel; Guerrero-Balaguera, Juan-David; Castañeda, Erika D.; Sanchez, Ernesto; Pérez-Holguín, Wilson-Javier
| Citazione | Data di pubblicazione | Autori | File |
|---|---|---|---|
| Power Side-Channel Analysis of the CVA6 RISC-V Core at the RTL Level Using VeriSide / Farnaghinejad, B., Porsia, A., Ruospo, A., Savino, A., Di Carlo, S., Sanchez, E.. - (In corso di stampa). (RESCUER: The first workshop on REliable and SeCUrE RISC-V architectures - Colocated with the IEEE European Test Symposium 2025 Tallinn, ESTONIA May 26 - 30, 2025) [10.48550/arxiv.2512.21362]. | In corso di stampa | Behnam FarnaghinejadAntonio PorsiaAnnachiara RuospoAlessandro SavinoStefano Di CarloErnesto Sanchez | CR_ETS_RESCUER_2025.pdf; 2512.21362v1.pdf |
| Reliability Assessment of QNN Functional Units deployed in RISC-V based systems / Perlo, G., Porsia, A., Ruospo, A., Sanchez, E.. - ELETTRONICO. - (In corso di stampa). (2026 Symposium on Integrated Circuits and Systems Design (SBCCI) São Paulo (BRA) 24-28 August 2026). | In corso di stampa | Perlo, GiacomoPorsia, AntonioRuospo, AnnachiaraSanchez, Ernesto | Perlo_SBCCI26.pdf |
| Advances in Testing and Reliability Benchmarks / Angione, F., Bernardi, P., Giardino, N.D.G., Filipponi, G., Iaria, G., Perlo, G., Pomeranz, I., Porsia, A., Ruospo, A., Sanchez, E., Turco, V.. - (2026), pp. 1-10. (31st IEEE European Test Symposium, ETS 2026 Chania (GRC) 25-29 May 2026) [10.1109/ets69887.2026.11591740]. | 1-gen-2026 | Angione, FrancescoBernardi, PaoloGiardino, Nicola Di GruttolaFilipponi, GabrieleIaria, GiusyPerlo, GiacomoPorsia, AntonioRuospo, AnnachiaraSanchez, ErnestoTurco, Vittorio + | Advances_in_Testing_and_Reliability_Benchmarks.pdf |
| Case Study: Integrating RISC-V Zicfiss Shadow Stack Support for Control-Flow Integrity on the CVA6 Processor / Farnaghinejad, B., Sanchez, E.. - ELETTRONICO. - (2026), pp. 1-2. (27th IEEE Latin American Test Symposium (LATS 2026) Florianópolis (BRA) 17-20 March 2026) [10.1109/lats70329.2026.11480312]. | 1-gen-2026 | Farnaghinejad, BehnamSanchez, Ernesto | Case_Study_Integrating_RISC-V_Zicfiss_Shadow_Stack_Support_for_Control-Flow_Integrity_on_the_CVA6_Processor.pdf; Case_Study__LATS2026__Integrating_RISC_V_Zicfiss_Shadow_Stack_Support_for_Control_Flow_Integrity_on_the_CVA6_Processor.pdf |
| Deep Learning-Based Power Side-Channel Evaluation from RTL Switching-Activity Proxies / Farnaghinejad, B., Ruospo, A., Savino, A., Di Carlo, S., Sanchez, E.. - ELETTRONICO. - (2026), pp. 1-6. (27th IEEE Latin American Test Symposium (LATS 2026) Florianópolis (BRA) 17-20 March 2026) [10.1109/lats70329.2026.11480302]. | 1-gen-2026 | Farnaghinejad, BehnamRuospo, AnnachiaraSavino, AlessandroDi Carlo, StefanoSanchez, Ernesto | Paper__LATS2026__Deep_Learning_Based_Power_Side_Channel_Evaluation_from_RTL_Switching_Activity_Proxies.pdf; Deep_Learning-Based_Power_Side-Channel_Evaluation_from_RTL_Switching-Activity_Proxies.pdf |
| Emulating SDC-1 Hardware Faults Through Application Level Bit-Flip Injections in QNNs / Perlo, G., Porsia, A., Ruospo, A., Sanchez, E.. - ELETTRONICO. - (2026), pp. 1-6. (2026 IEEE 27th Latin American Test Symposium (LATS) Florianópolis (BRA) 17-20 March 2026) [10.1109/lats70329.2026.11480360]. | 1-gen-2026 | Perlo, GiacomoPorsia, AntonioRuospo, AnnachiaraSanchez, Ernesto | LATS26_Perlo.pdf |
| Vectorized in-Place CRC: a Zero Memory-Overhead Fault Detection Scheme for QNNs on RISC-V / Perlo, G., Ruospo, A., Sanchez, E.. - ELETTRONICO. - (2026), pp. 1-7. (2026 IEEE 32nd International Symposium on On-Line Testing and Robust System Design (IOLTS) Polignano a Mare (IT) 01-03 July 2026) [10.1109/IOLTS69666.2026.11633783]. | 1-gen-2026 | Perlo G.Ruospo A.Sanchez E. | IOLTS26_Perlo.pdf |
| VeriSide-II: Structure-Aware Power Modeling for Side-Channel Analysis at Register Transfer Level / Farnaghinejad, B., Ruospo, A., Savino, A., Di Carlo, S., Sanchez, E.. - (2026), pp. 1-5. (2026 IEEE 32nd International Symposium on On-Line Testing and Robust System Design (IOLTS) Polignano a Mare (BA), Italy 1-3 July 2026) [10.1109/iolts69666.2026.11633634]. | 1-gen-2026 | Farnaghinejad, BehnamRuospo, AnnachiaraSavino, AlessandroDi Carlo, StefanoSanchez, Ernesto | IEEE_VeriSide-II_Structure-Aware_Power_Modeling_for_Side-Channel_Analysis_at_Register_Transfer_Level.pdf; IOLTS2026-IRIS.pdf |
| APSS Metrics for Fault Detection: Area, Position, Symmetry, and Shape in Image Segmentation / Turco, V., Fezza, L., Ruospo, A., Sanchez, E., Sonza Reorda, M.. - ELETTRONICO. - (2025). (DFT 2025 38th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems Barcellona (ESP) 21-23 October 2025) [10.1109/DFT66274.2025.11257474]. | 1-gen-2025 | Turco, VittorioFezza, LorenzoRuospo, AnnachiaraSanchez, ErnestoSonza Reorda, Matteo | DFT25___Segmentation_metrics.pdf; APSS_Metrics_for_Fault_Detection_Area_Position_Symmetry_and_Shape_in_Image_Segmentation.pdf |
| Bi-LORD: Bit-Wise Low-Cost Real Numbers Dependability Assessment in AI Applications / Azziz, J., Ruospo, A., Sanchez, E., Acle, J.P.. - (2025), pp. 1-6. (26th IEEE Latin American Test Symposium, LATS 2025 San Andres Island (COL) 11-14 March 2025) [10.1109/lats65346.2025.10963952]. | 1-gen-2025 | Ruospo, AnnachiaraSanchez, Ernesto + | lats25_posit.pdf; Bi-LORD_Bit-Wise_Low-Cost_Real_Numbers_Dependability_Assessment_in_AI_Applications.pdf |
| DEAR-CNN: Data-Efficient Assessment of Resiliency in Convolutional Neural Networks / Bellarmino, N., Bosio, A., Cantoro, R., Ruospo, A., Sanchez, E.. - ELETTRONICO. - (2025), pp. 13-18. (28th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS) Lyon (FRA) May 5-7, 2025) [10.1109/DDECS63720.2025.11006797]. | 1-gen-2025 | Nicolo' BellarminoAlberto BosioRiccardo CantoroAnnachiara RuospoErnesto Sanchez | 2025_DDECS_DNN_TEST_COMPACTION_CONFERENCE (1).pdf; DEAR-CNN_Data-Efficient_Assessment_of_Resiliency_in_Convolutional_Neural_Networks.pdf |
| DOC: Detection of On-Line Failures in CNNs / Turco, V., Bellarmino, N., Ruospo, A., Cantoro, R., Sanchez, E.. - ELETTRONICO. - (2025). (Latin American Test Workshop, LATW San Andrés (COL) 11-14 March 2025) [10.1109/LATS65346.2025.10963935]. | 1-gen-2025 | Turco VittorioNicolò BellarminoAnnachiara RuospoCantoro RiccardoErnesto Sanchez | LATS2025_On_line_detection (3).pdf; DOC_Detection_of_On-Line_Failures_in_CNNs.pdf |
| Image Test Libraries for the in-field test of ultra-low-power devices / Porsia, A., Perlo, G., Ruospo, A., Sanchez, E.. - ELETTRONICO. - (2025). (Latin American Test Workshop, LATW San Andrés (Colombia) 11-14 March 2025) [10.1109/LATS65346.2025.10963940]. | 1-gen-2025 | Porsia, AntonioPerlo, GiacomoRuospo, AnnachiaraSanchez, Ernesto | LATS25_ITL-3.pdf; Image_Test_Libraries_for_the_In-Field_Test_of_Ultra-Low-Power_Devices.pdf |
| Investigating on Gradient Regularization for Testing Neural Networks / Bellarmino, N., Bosio, A., Cantoro, R., Ruospo, A., Sanchez, E., Squillero, G.. - ELETTRONICO. - 15509:(2025), pp. 67-81. (10th International Conference on machine Learning, Optimization and Data science (LOD 2024) Castiglione della Pescaia (ITA) September 22 – 25, 2024) [10.1007/978-3-031-82484-5_6]. | 1-gen-2025 | Bellarmino, NicoloBosio, AlbertoCantoro, RiccardoRuospo, AnnachiaraSanchez, ErnestoSquillero, Giovanni | 2024_LOD_GRADIENT_PENALIZATION.pdf; 978-3-031-82484-5_6.pdf |
| Late Contribution: VeriSide: A Modified Verilator for Leakage Assessment at the RTL Level / Farnaghinejad, B., Porsia, A., Ruospo, A., Savino, A., Di Carlo, S., Sanchez, E.. - ELETTRONICO. - (2025), pp. 1-2. (26th IEEE Latin American Test Samposium 2025 San Andres Islas (COL) 11-14 March 2025) [10.1109/lats65346.2025.10963943]. | 1-gen-2025 | Farnaghinejad, BehnamPorsia, AntonioRuospo, AnnachiaraSavino, AlessandroDi Carlo, StefanoSanchez, Ernesto | LATS2025_IRIS.pdf; Late_Contribution_VeriSide_A_Modified_Verilator_for_Leakage_Assessment_at_the_RTL_Level.pdf |
| On the resilience of INT8 Quantized Neural Networks on Low-Power RISC-V Devices / Porsia, A., Perlo, G., Ruospo, A., Sanchez, E.. - (2025), pp. 119-122. (AxC’25 The 10th Workshop on Approximate Computing Naples (Ita) June 23-26, 2025) [10.1109/DSN-W65791.2025.00049]. | 1-gen-2025 | Antonio PorsiaGiacomo PerloAnnachiara RuospoErnesto Sanchez | AxC2025.pdf; On_the_Resilience_of_INT8_Quantized_Neural_Networks_on_Low-Power_RISC-V_Devices.pdf |
| Power Side-Channel Vulnerabilities of a RISC-V Cryptography Accelerator Integrated into CVA6 via Core-V eXtension Interface (CV-X-IF) / Farnaghinejad, B., Bellizia, D., Dolmeta, A., Masera, G., Porsia, A., Ruospo, A., Di Carlo, S., Savino, A., Sanchez, E.. - (2025), pp. 233-242. (International Test Conference 2025 San Diego, California (USA) September 20-26, 2025) [10.1109/ITC58126.2025.00030]. | 1-gen-2025 | Behnam FarnaghinejadAlessandra DolmetaGuido MaseraAntonio PorsiaAnnachiara RuospoStefano Di CarloAlessandro SavinoErnesto Sanchez + | ITC2025___Power_Side_Channel_Vulnerabilities_of_a_RISC_V_Cryptography_Accelerator_Integrated_into_CVA6_via_CV_X_IF.pdf; Power_Side-Channel_Vulnerabilities_of_a_RISC-V_Cryptography_Accelerator_Integrated_into_CVA6_via_Core-V_eXtension_Interface_CV-X-IF.pdf |
| Special Session: Trustworthy Hardware-AI at the Cloud / Angione, F., Bernardi, P., Bosio, A., Dattatraya Dixit, H., Pappalardo, S., Ruospo, A., Sanchez, E., Sinha, A., Turco, V.. - ELETTRONICO. - (2025). (IEEE VLSI Test Symposium 2025 Tempe, Arizona (USA) 28-30 April 2025) [10.1109/VTS65138.2025.11022869]. | 1-gen-2025 | Francesco AngionePaolo BernardiAnnachiara RuospoErnesto SanchezVittorio Turco + | VTS25___Special_Session.pdf; Special_Session_Trustworthy_Hardware-AI_at_the_Cloud.pdf |
| AI Eye Charts: measuring the visual acuity of Neural Networks with test images / Porsia, A., Ruospo, A., Sanchez, E.. - ELETTRONICO. - (2024), pp. 1-5. (IEEE 2nd International conference on Design, Test & Technology of Integrated Systems Aix-en-Provence (FR) 14-16 October 2024) [10.1109/DTTIS62212.2024.10780079]. | 1-gen-2024 | Porsia, AntonioRuospo, AnnachiaraSanchez, Ernesto | ITL_SpecialSession-1.pdf; AI_Eye_Charts_measuring_the_visual_acuity_of_Neural_Networks_with_test_images.pdf |
| An Integrated Environment for the Reliability Assessment of CNNs Accelerators Implemented in FPGAs / Mesa, L.A., Guerrero-Balaguera, J., Castañeda, E.D., Sanchez, E., Pérez-Holguín, W.. - ELETTRONICO. - (2024). (2024 IEEE 25th Latin American Test Symposium (LATS) Maceio (BRA) 09-12 April 2024) [10.1109/lats62223.2024.10534609]. | 1-gen-2024 | Guerrero-Balaguera, Juan-DavidSanchez, Ernesto + | An_Integrated_Environment_for_the_Reliability_Assessment_of_CNNs_Accelerators_Implemented_in_FPGAs.pdf |