PORTO @ Archivio Istituzionale della Ricerca

ZAMBONI, Maurizio
 Distribuzione geografica
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Continente #
NA - Nord America 27.143
EU - Europa 23.295
AS - Asia 7.860
SA - Sud America 1.120
AF - Africa 233
OC - Oceania 17
Continente sconosciuto - Info sul continente non disponibili 12
-- - ???statistics.table.value.continent.--??? 3
Totale 59.683
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Nazione #
US - Stati Uniti d'America 26.859
IT - Italia 5.601
DE - Germania 4.404
FR - Francia 4.143
GB - Regno Unito 4.022
SG - Singapore 2.959
CN - Cina 2.337
UA - Ucraina 1.286
BR - Brasile 936
NL - Olanda 654
SE - Svezia 613
KR - Corea 584
TR - Turchia 563
RU - Federazione Russa 522
IE - Irlanda 455
CH - Svizzera 410
AT - Austria 297
FI - Finlandia 280
VN - Vietnam 279
HK - Hong Kong 256
IN - India 201
CA - Canada 197
JP - Giappone 154
BE - Belgio 144
JO - Giordania 109
ID - Indonesia 86
RO - Romania 83
IR - Iran 81
ZA - Sudafrica 76
AR - Argentina 64
SN - Senegal 60
BD - Bangladesh 51
MX - Messico 49
BG - Bulgaria 47
AP - ???statistics.table.value.countryCode.AP??? 42
ES - Italia 38
PL - Polonia 37
IQ - Iraq 36
CL - Cile 35
EU - Europa 29
IL - Israele 28
EC - Ecuador 27
PK - Pakistan 26
AE - Emirati Arabi Uniti 25
TW - Taiwan 23
MY - Malesia 22
CZ - Repubblica Ceca 21
GR - Grecia 21
NO - Norvegia 18
EE - Estonia 17
EG - Egitto 17
CI - Costa d'Avorio 16
VE - Venezuela 16
AU - Australia 14
MA - Marocco 13
UY - Uruguay 13
KE - Kenya 12
SA - Arabia Saudita 12
PE - Perù 11
CO - Colombia 10
DK - Danimarca 9
HU - Ungheria 9
PT - Portogallo 9
AL - Albania 8
DZ - Algeria 8
PH - Filippine 8
UZ - Uzbekistan 8
BY - Bielorussia 7
DO - Repubblica Dominicana 7
KZ - Kazakistan 6
LT - Lituania 6
LV - Lettonia 6
NP - Nepal 6
PY - Paraguay 6
SI - Slovenia 6
TN - Tunisia 6
AZ - Azerbaigian 5
BA - Bosnia-Erzegovina 5
CR - Costa Rica 5
HN - Honduras 5
HR - Croazia 5
PR - Porto Rico 5
SC - Seychelles 5
SK - Slovacchia (Repubblica Slovacca) 5
BH - Bahrain 4
JM - Giamaica 4
LB - Libano 4
NG - Nigeria 4
RS - Serbia 4
TH - Thailandia 4
TT - Trinidad e Tobago 4
A1 - Anonimo 3
GH - Ghana 3
KG - Kirghizistan 3
NZ - Nuova Zelanda 3
PS - Palestinian Territory 3
SM - San Marino 3
XK - ???statistics.table.value.countryCode.XK??? 3
ET - Etiopia 2
GA - Gabon 2
Totale 59.649
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Città #
Ashburn 6.433
Southend 3.498
Seattle 2.512
Fairfield 2.058
Singapore 1.449
Turin 1.416
Chandler 1.216
Woodbridge 945
Des Moines 849
Houston 789
Ann Arbor 745
Cambridge 734
Princeton 709
Jacksonville 695
Boardman 690
Wilmington 671
Beijing 488
San Ramon 465
Buffalo 447
Torino 444
Milan 443
Dublin 434
Berlin 421
Izmir 418
Bern 335
Dallas 332
San Francisco 305
Santa Clara 303
Helsinki 253
Mountain View 220
San Donato Milanese 218
Hong Kong 211
San Jose 204
Shanghai 198
Herkenbosch 193
Seoul 189
Pennsylvania Furnace 186
Council Bluffs 183
Bologna 180
Vienna 165
Overberg 161
Zaporozhye 161
Baltimore 156
Chicago 151
Monopoli 149
North Bergen 147
Zhengzhou 145
Saint Petersburg 138
Los Angeles 128
Brussels 122
Hefei 117
Overland Park 103
Toronto 103
Lauterbourg 101
Norwalk 98
Redwood City 97
Hangzhou 93
Amsterdam 90
Fuzhou 90
Padua 88
San Diego 86
Austin 85
Ho Chi Minh City 83
Tokyo 81
Guangzhou 76
Nuremberg 74
São Paulo 74
Rome 73
Fremont 71
Jakarta 68
London 68
New York 68
Hanoi 67
Atlanta 64
Las Vegas 64
Malatya 63
Munich 57
Galati 56
Paris 52
Phoenix 52
Andover 47
Lecce 47
Melun 46
Muizenberg 45
Orbassano 45
Shenzhen 45
Istanbul 42
Indiana 41
San Mateo 41
Columbus 40
Bremen 39
Frankfurt 39
Seongnam 39
Belo Horizonte 38
Dearborn 37
Frankfurt am Main 35
University Park 35
Rotterdam 34
Verona 33
Dong Ket 31
Totale 37.263
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Nome #
NanoMagnet Logic: an Architectural Level Overview 805
Physical design and testing of Nano Magnetic architectures 654
Logic-In-Memory: A NanoMagnet Logic Implementation 630
A case study for NoC based homogeneous MPSoC architectures 601
ToPoliNano: Nano-magnet Logic Circuits Design and Simulation 575
A 1-bit Synchronization Algorithm for a Reduced Complexity Energy Detection UWB Receiver 566
A NoC-based hybrid message-passing/shared-memory approach to CMP design 554
Protein Alignment Systolic Array Throughput Optimization 533
Interleaving in Systolic-Arrays: a Throughput Breakthrough 523
Asynchronous Solutions for Nano-Magnetic Logic Circuits 518
Effects of Temperature in Deep-Submicron Global Interconnect Optimization in Future Technology Nodes 509
Logic-in-Memory architecture made real 506
Feedbacks in QCA: a Quantitative Approach 500
Enabling Design and Simulation of Massive Parallel Nanoarchitectures 499
A standard cell approach for MagnetoElastic NML circuits 492
Protein alignment HW/SW optimizations 491
An Electromigration and Thermal Model of Power Wires for a Priori High-Level Reliability Prediction 485
A Flexible Simulation Methodology and Tool for Nanoarray-based Architectures 480
MEDEA: A Hybrid Shared-memory/Message-passing Multiprocessor NoC-based Architecture 480
Reconfigurable Systolic Array: From Architecture to Physical Design for NML 478
On the functional test of the BTB logic in pipelined and superscalar processors 474
Dynamic Gap Selector: A Smith Waterman Sequence Alignment Algorithm with Affine Gap Model Optimisation 473
Asynchrony in Quantum-Dot Cellular Automata Nanocomputation: Elixir or Poison? 472
Biosequences analysis on NanoMagnet Logic 470
Clock distribution network optimization under self heating andtiming constraints 468
ToPoliNano: NanoMagnet Logic Circuits Design and Simulation 465
Energy Evaluation on a Reconfigurable, Multimedia-Oriented Wireless Sensor 465
Power-Gating Technique for Network-on-Chip Buffers 458
Hardware Acceleration of Beamforming in a UWB Imaging Unit for Breast Cancer Detection 450
Majority Voter Full Characterization for NanoMagnet Logic Circuits 447
Efficient and reliable fault analysis methodology for nanomagnetic circuits 445
Electric clock for Nano-magnet Logic Circuits 442
A Joint Source/Channel Approach to Strengthen Embedded Programmable Devices against Flash Memory Errors 442
A Low-power CMOS 2-PPM Demodulator for Energy Detection IR-UWB Receivers 439
A Mixed-Signal Demodulator for a Low-Complexity IR-UWB Receiver: Methodology, Simulation and Design 436
A quantitative approach to testing in Quantum dot Cellular Automata: NanoMagnet Logic case 432
A multiprocessor based packet-switch: performance analysis of the communication infrastructure. 419
Magnetoelastic clock system for NanoMagnet Logic 408
A NCL-HDL Snake-Clock Based Magnetic QCA Architecture 407
ToPoliNano: a CAD Tool for Nano Magnetic Logic 403
Effects of Temperature in Deep-Submicron Global Interconnect Optimization 401
Automatic Place & Route of Nano-Magnetic Logic Circuits 400
INTRODUZIONE ALL'ANALISI DEI SISTEMI ELETTRONICI 394
Domain Magnet Logic (DML): A new approach to magnetic circuits 394
An effective AMS Top-Down Methodology Applied to the Design of a Mixed-Signal UWB System-on-Chip 393
Modeling, Design, and Analysis of MagnetoElastic NML Circuits 382
A Technology Aware Magnetic QCA NCL-HDL Architecture 381
ToPoliNano: Nanoarchitectures Design Made Real 375
UWB Receiver Design and Two-Way-Ranging Simulation using VHDL-AMS 367
A Fully Differential Digital CMOS Pulse UWB Generator 356
Magnetic QCA Majority Voter Feasibility Analysis 350
Design of NML Circuits based on M-RAM 348
ULTRA WIDE BAND TRANSMITTER FOR BREAST CANCER DETECTION 343
Design of MRAM Based Magnetic Logic Circuits 341
Deflection Network: Principles, Implementation, Services 340
A Block-Based Approach for SoC global Interconnect Electrical ParamenterCharacterization 339
Virtual Clocking for NanoMagnet Logic 334
Breast Cancer Detection based on an UWB Imaging System: Receiver Design and Simulations 333
Nanofabric Power Analysis: Biosequence Alignment Case of Study 331
Testing Nanoarrays Fault Tolerance 328
Design Challenges of an UWB System for Breast Cancer Detection 328
A methodology and a case-study for Network-on-Chipbased MP-SoC architectures 326
Out-of-Plane NML Modeling and Architectural Exploration 321
3D design of a pNML random access memory 320
Towards Compact Modeling of Noisy Quantum Computers: A Molecular-Spin-Qubit Case of Study 320
Reduction of Leakage Power in Networks-on-Chip with Buffers Power-Gating 307
ELETTRONICA DEI SISTEMI DI INTERCONNESSIONE ED ACQUISIZIONE DATI 304
Nanoarray Architectures Multilevel Simulation 303
A VLSI architecture for IWT (Integer Wavelet Transform) 301
Domain Wall Interconnections for NML 299
Electric Clock for NanoMagnet Logic Circuits 292
UWB Microwave Imaging for Breast Cancer Detection: Many-Core, GPU, or FPGA? 292
DVFS Based on Voltage Dithering and Clock Scheduling for GALS Systems 290
Design and implementation of a scalable multimedia processor 289
UWB Receiver for Breast Cancer Detection: Comparison Between Two Different Approaches 288
A high accuracy-low complexity model for CMOS delays 286
Silicon nanoarray circuits design, modeling, simulation and fabrication 286
VLSI architectures for turbo codes 283
Effects of Temperature in Deep-Submicron Global Interconnect Optimization 281
The NoCRay Graphic Accelerator: a Case-study for MP-SoC Network-on-Chip Design Methodology 281
Simulation and design of an UWB imaging system for breast cancer detection 276
Magnetic QCA Design: Modeling, Simulations and Circuits 275
Octantis: An Exploration Tool for Beyond von Neumann architectures 275
Architectural Strategies for Low-Power VLSI Turbo Decoders 269
System architecture for error-resilient, embedded JPEG2002 wireless delivery 269
Coupled electro-thermal modeling and optimization of clock networks 269
A reduced clock swing domino gate in SOI 269
NANOcom: A Mosaic Approach for nanoelectronic circuits design 268
A reconfigurable array architecture for NML 265
Data processing and information classification— an in-memory approach 265
VLSI Reed-Solomon Decoder Architecture for Networked Multimedia Applications 260
NanoMagnetic Logic Microprocessor Hierarchical Power Model 256
ToPoliNano: A synthesis and simulation tool for NML circuits 254
Comparative analysis of PD-SOI Active Body-Biasing Circuits 254
FPGA Power Efficient Inverse Lifting Wavelet IP 253
Reconfigurable DSP IP for Multimedia Applications 250
A statistical noise-tolerance analysis and test structure for logic families 248
Hybrid-SIMD: a Modular and Reconfigurable approach to Beyond von Neumann Computing 247
Noise-tolerance analysis for high speed CMOS circuits 240
A Simple DVFS Controller for a NoC Switch 239
Totale 38.222
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Categoria #
all - tutte 158.614
article - articoli 49.625
book - libri 3.140
conference - conferenze 96.978
curatela - curatele 0
other - altro 0
patent - brevetti 1.797
selected - selezionate 0
volume - volumi 7.074
Totale 317.228
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/20211.950 0 0 0 0 0 414 191 318 219 362 259 187
2021/20223.330 171 213 77 256 237 285 234 96 114 348 660 639
2022/20235.240 419 680 190 406 506 608 1.019 236 426 65 282 403
2023/20241.575 111 153 60 96 221 158 43 162 101 68 158 244
2024/20254.559 108 581 244 471 260 244 305 323 808 345 405 465
2025/20265.547 708 695 1.032 1.242 904 966 0 0 0 0 0 0
Totale 60.089