Among various emerging technologies, Nano Magnetic Logic (NML) is the one that may represent, in future, a replacement of CMOS for many reasons. In the last years, researchers have been conducting experiments to understand the properties and potentialities of this novel technology. NML can be used to build any kind of logic circuit and, because of its intrinsic magnetic nature, it is perfectly suitable to store data. However, the exploration of NML structures used as memories is very poor. In this paper, we propose the design of a 4×4 memory entirely based on perpendicular NML (pNML) technology. Magnets are placed onto two different overlapped layers to avoid routing congestion. The novelty introduced by this work is a distributed and modular memory cell that enables the design of highly regular memory structures optimized in terms of area occupation and write and read latency. The entire memory was also modeled in VHDL (VHSIC Hardware Description Language) and simulated to demonstrate its functional correctness.

3D design of a pNML random access memory / Ferrara, Antonino; Garlando, Umberto; Gnoli, Luca; Santoro, Giulia; Zamboni, Maurizio. - ELETTRONICO. - (2017), pp. 5-8. ((Intervento presentato al convegno 13th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2017 tenutosi a Atahotel Naxos Beach Conference Center, ita nel 2017 [10.1109/PRIME.2017.7974093].

3D design of a pNML random access memory

GARLANDO, UMBERTO;GNOLI, LUCA;SANTORO, GIULIA;ZAMBONI, Maurizio
2017

Abstract

Among various emerging technologies, Nano Magnetic Logic (NML) is the one that may represent, in future, a replacement of CMOS for many reasons. In the last years, researchers have been conducting experiments to understand the properties and potentialities of this novel technology. NML can be used to build any kind of logic circuit and, because of its intrinsic magnetic nature, it is perfectly suitable to store data. However, the exploration of NML structures used as memories is very poor. In this paper, we propose the design of a 4×4 memory entirely based on perpendicular NML (pNML) technology. Magnets are placed onto two different overlapped layers to avoid routing congestion. The novelty introduced by this work is a distributed and modular memory cell that enables the design of highly regular memory structures optimized in terms of area occupation and write and read latency. The entire memory was also modeled in VHDL (VHSIC Hardware Description Language) and simulated to demonstrate its functional correctness.
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11583/2679315
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