This works presents an integrated 0.18μm CMOS 2-PPM demodulator based on a switched capacitor network for an Energy Detection Impulse-Radio UWB receiver. The circuit has been designed using a top-down methodology that allows to discover the impact of low-level non-idealities on system-level performance. Through the use of a mixed signal simulation environment, performance figures have been obtained which helped evaluate the influence at system-level of the non-idealities of the most critical block. Results show that the circuit allows the replacement of the ADC typically employed in Energy Detection receivers and provides about infinite equivalent quantization resolution. The demodulator achieves 190 pJ/bit at 1.8V.
|Titolo:||A Mixed-Signal Demodulator for a Low-Complexity IR-UWB Receiver: Methodology, Simulation and Design|
|Data di pubblicazione:||2009|
|Digital Object Identifier (DOI):||10.1016/j.vlsi.2008.07.005|
|Appare nelle tipologie:||1.1 Articolo in rivista|