DU, BOYANG

DU, BOYANG  

Dipartimento di Automatica e Informatica  

Boyang, D.  

031122  

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A 3D Simulation-based Approach to Analyze Heavy Ions-induced SET on Digital Circuits / Sterpone, L.; Luoni, F.; Azimi, S.; Du, B.. - In: IEEE TRANSACTIONS ON NUCLEAR SCIENCE. - ISSN 0018-9499. - (2020). [10.1109/TNS.2020.3006997] 1-gen-2020 L. SterponeS. AzimiB. Du + FINAL_VERSION.pdf09133159.pdf
A New Hybrid Nonintrusive Error-Detection Technique Using Dual Control-Flow Monitoring / L., Parra; A., Lindoso; M., Portela Garcia; L., Entrena; Du, Boyang; SONZA REORDA, Matteo; Sterpone, Luca. - In: IEEE TRANSACTIONS ON NUCLEAR SCIENCE. - ISSN 0018-9499. - 61:(2014), pp. 3236-3243. [10.1109/TNS.2014.2361953] 1-gen-2014 DU, BOYANGSONZA REORDA, MatteoSTERPONE, Luca + -
A New Solution to On-Line Detection of Control Flow Errors / Du, Boyang; SONZA REORDA, Matteo; Sterpone, Luca; L., Parra; M., Portela Garcia; A., Lindoso; L., Entrena. - ELETTRONICO. - (2014), pp. 105-110. ((Intervento presentato al convegno IEEE 20th International On-Line Testing Symposium tenutosi a Hotel Cap Roig, Platja d’Aro, Catalunya, Spain. 1-gen-2014 DU, BOYANGSONZA REORDA, MatteoSTERPONE, Luca + -
About the functional test of the GPGPU scheduler / Du, B.; RODRIGUEZ CONDIA, JOSIE ESTEBAN; Sonza Reorda, M.; Sterpone, L.. - ELETTRONICO. - (2018). ((Intervento presentato al convegno 24th IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2018) tenutosi a Hotel Cap Roig, Platja d’Aro, Costa Brava, Spain nel July 2-4, 2018 [10.1109/IOLTS.2018.8474174]. 1-gen-2018 B. DuRODRIGUEZ CONDIA, JOSIE ESTEBANM. Sonza ReordaL. Sterpone IOLTS18 v Camera Ready.pdfAbout_the_functional_test_of_the_GPGPU_scheduler.pdf
Accurate Analysis of SET effects on Flash-based FPGA System-on-a-Chip for Satellite Application / Raoul, Grimoldi; David, Merodio Codinachs; Luca, Fossati; Du, Boyang; Sterpone, Luca. - ELETTRONICO. - (2016). ((Intervento presentato al convegno IEEE 19th International Symposium on Design and Diagnostic of Electronic Circuits & Systems (DDECS) tenutosi a Kosice, Slovakia nel April 20-22. 1-gen-2016 DU, BOYANGSTERPONE, LUCA + -
Accurate Analysis of SET effects on Flash-based FPGA System-on-a-Chip for Satellite Applications / Azimi, Sarah; Du, Boyang; Sterpone, Luca. - ELETTRONICO. - (2016). ((Intervento presentato al convegno Radiation Effects on Components & Systems Conference [10.1109/RADECS.2016.8093203]. 1-gen-2016 AZIMI, SARAHDU, BOYANGSTERPONE, LUCA RADECS_Sterpone_PJ6.pdfAccurate_analysis_of_SET_effects_on_Flash-based_FPGA_System-on-a-Chip_for_satellite_applications.pdf
Accurate Analysis of SET effects on Flash-based FPGA System-on-a-Chip for Satellite Applications / Azimi, Sarah; Du, Boyang; Sterpone, Luca; Grimoldi, Raoul; Fossati, Luca; Codinachs, David Merodio. - ELETTRONICO. - (2016). ((Intervento presentato al convegno 2016 IEEE 19th International Symposium on Design and Diagnostic of Electronic Circuits & Systems (DDECS) tenutosi a Kosice nel April 20-22. 1-gen-2016 AZIMI, SARAHDU, BOYANGSTERPONE, LUCA + DDECS_transient_modeling_v16f_ls.pdf
Accurate Mitigation of Single Event Effects on Flash-based FPGAs: A new Design Flow / Sterpone, Luca; Du, Boyang; D., Merodio Codinachs; V., Ferlet Cavrois. - ELETTRONICO. - (2013). ((Intervento presentato al convegno RADECS tenutosi a Oxford nel September, 2013. 1-gen-2013 STERPONE, LucaDU, BOYANG + -
Analysis and mitigation of SEUs in ARM-based SoC on Xilinx Virtex-V SRAM-based FPGAS / Du, Boyang; Desogus, Marco; Sterpone, Luca. - (2015), pp. 236-239. ((Intervento presentato al convegno 11th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2015 tenutosi a gbr nel 2015 [10.1109/PRIME.2015.7251378]. 1-gen-2015 DU, BOYANGDESOGUS, MARCOSTERPONE, LUCA -
Analysis and mitigation of single event effects on flash-based FPGAS / Sterpone, Luca; Du, Boyang. - ELETTRONICO. - (2014), pp. 1-6. ((Intervento presentato al convegno IEEE 19th EUROPEAN TEST SYMPOSIUM (ETS) tenutosi a Paderborn, Germany [10.1109/ETS.2014.6847804]. 1-gen-2014 STERPONE, LucaDU, BOYANG -
Analysis of Radiation-induced SETs in 3D VLSI Face-to-Back LUTs / Sterpone, Luca; Bozzoli, Ludovica; DE SIO, Corrado; Du, Boyang; Azimi, Sarah. - (2019). ((Intervento presentato al convegno 30th IEEE Radiation and its Effects on Components and Systems (RADECS 2019). 1-gen-2019 Luca SterponeLudovica BozzoliCorrado De SioBoyang DuSarah Azimi -
Analyzing Radiation-induced Transient Errors on SRAM-based FPGAs by Propagation of Broadening Effect / DE SIO, Corrado; Azimi, Sarah; Sterpone, Luca; Du, Boyang. - In: IEEE ACCESS. - ISSN 2169-3536. - 7:(2019), pp. 140182-140189. [10.1109/ACCESS.2019.2915136] 1-gen-2019 Corrado De SioSarah AzimiLuca SterponeBoyang Du 08708270.pdf
An Automated Continuous Integration Multitest Platform for Automotive Systems / Du, Boyang; Azimi, Sarah; Moramarco, Annarita; Sabena, Davide; Parisi, Filippo; Sterpone, Luca. - In: IEEE SYSTEMS JOURNAL. - ISSN 1932-8184. - ELETTRONICO. - 16:2(2021), pp. 2495-2506. [10.1109/JSYST.2021.3069548] 1-gen-2022 Du, BoyangAzimi, SarahMoramarco, AnnaritaSabena, DavideSterpone, Luca + IEEESystem_2021.pdfAn_Automated_Continuous_Integration_Multitest_Platform_for_Automotive_Systems.pdf
Effective Mitigation of Radiation-induced Single Event Transient on Flash-based FPGAs / Azimi, Sarah; Du, Boyang; Sterpone, Luca; Merodio Codinachs, David; Grimoldi, Raoul. - ELETTRONICO. - (2017), pp. 203-208. ((Intervento presentato al convegno GLSVLSI '17 tenutosi a Banff, Alberta, Canada nel May 10 - 12, 2017 [10.1145/3060403.3060454]. 1-gen-2017 AZIMI, SARAHDU, BOYANGSTERPONE, LUCA + glsv142-sterpone_final.pdf
Electron inducing soft errors in 28 nm system-on-Chip / Yang, W.; Li, Y.; Zhang, W.; Guo, Y.; Zhao, H.; Wei, J.; Li, Y.; He, C.; Chen, K.; Guo, G.; Du, B.; Sterpone, L.. - In: RADIATION EFFECTS AND DEFECTS IN SOLIDS. - ISSN 1042-0150. - 175:7-8(2020), pp. 745-754. [10.1080/10420150.2020.1759067] 1-gen-2020 Yang W.Du B.Sterpone L. + Electron inducing soft errors in 28 nm system on Chip.pdf
Evaluation of transient errors in GPGPUs for safety critical applications: An effective simulation-based fault injection environment / Azimi, Sarah; Du, Boyang; Sterpone, Luca. - In: JOURNAL OF SYSTEMS ARCHITECTURE. - ISSN 1383-7621. - ELETTRONICO. - 75:(2017), pp. 95-106. [10.1016/j.sysarc.2017.01.009] 1-gen-2017 AZIMI, SARAHDU, BOYANGSTERPONE, LUCA 1-s2.0-S1383762117300528-main.pdf
EXPLOITING THE DEBUG INTERFACE TO SUPPORT ON LINE TEST OF CONTROL FLOW ERRORS / Du, Boyang; SONZA REORDA, Matteo; Sterpone, Luca; L., Parra; M., PORTELA GARCIA; A., Lindoso; L., Entrena. - STAMPA. - (2013), pp. 98-103. ((Intervento presentato al convegno 2013 IEEE 19th International On-Line Testing Symposium (IOLTS) [10.1109/IOLTS.2013.6604058]. 1-gen-2013 DU, BOYANGSONZA REORDA, MatteoSTERPONE, Luca + 06604058.pdf
An extended model to support detailed GPGPU reliability analysis / Du, B.; RODRIGUEZ CONDIA, JOSIE ESTEBAN; Reorda, M. S.. - ELETTRONICO. - (2019), pp. 1-6. ((Intervento presentato al convegno 14th IEEE International Conference on Design and Technology of Integrated Systems In Nanoscale Era, DTIS 2019 tenutosi a grc nel 2019 [10.1109/DTIS.2019.8735047]. 1-gen-2019 Du B.RODRIGUEZ CONDIA, JOSIE ESTEBANReorda M. S. camera ready version.pdf08735047.pdf
Fault Tolerant Electronic System Design / Du, Boyang. - (2016). [10.6092/polito/porto/2644047] 1-gen-2016 DU, BOYANG DU_BOYANG_thesis.pdf
Fault tolerant electronic system design / Du, Boyang; Sterpone, Luca. - 2017-:(2017), pp. 1-6. ((Intervento presentato al convegno 48th IEEE International Test Conference, ITC 2017 tenutosi a Forth Worth Convention Center, usa nel 2017 [10.1109/TEST.2017.8242080]. 1-gen-2017 Du, BoyangSterpone, Luca -