RODRIGUEZ CONDIA, JOSIE ESTEBAN

RODRIGUEZ CONDIA, JOSIE ESTEBAN  

Dipartimento di Automatica e Informatica  

046136  

Mostra records
Risultati 1 - 20 di 36 (tempo di esecuzione: 0.006 secondi).
Citazione Data di pubblicazione Autori File
About the functional test of the GPGPU scheduler / Du, B.; RODRIGUEZ CONDIA, JOSIE ESTEBAN; Sonza Reorda, M.; Sterpone, L.. - ELETTRONICO. - (2018). ((Intervento presentato al convegno 24th IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2018) tenutosi a Hotel Cap Roig, Platja d’Aro, Costa Brava, Spain nel July 2-4, 2018 [10.1109/IOLTS.2018.8474174]. 1-gen-2018 B. DuRODRIGUEZ CONDIA, JOSIE ESTEBANM. Sonza ReordaL. Sterpone -
ACELERÓGRAFO TRIAXIAL PORTÁTIL QUE COMPRENDE UN RECEPTOR DE TRAMAS NMEA-GPS / rodriguez condia, josie e.; PEREZ HOLGUIN, WILSON JAVIER. - (2014). 1-gen-2014 rodriguez condia, josie e. + Resolución Concesión de Patente.pdf
Analyzing the Sensitivity of GPU Pipeline Registers to Single Events Upsets / Rodriguez Condia, Josie E.; Goncalves, Marcio M.; Azambuja, Jose Rodrigo; Sonza Reorda, Matteo; Sterpone, Luca. - ELETTRONICO. - (2020), pp. 380-385. ((Intervento presentato al convegno 2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) tenutosi a Limassol, Cyprus nel 6-8 July 2020 [10.1109/ISVLSI49217.2020.00076]. 1-gen-2020 Rodriguez Condia, Josie E.Sonza Reorda, MatteoSterpone, Luca + PID6470519.pdf09155054.pdf
Combining architectural simulation and software fault injection for a fast and accurate CNNs reliability evaluation on GPUs / Rodriguez Condia, Josie E.; Fernandes dos Santos, Fernando.; Sonza Reorda, Matteo; Rech, P.. - ELETTRONICO. - 2021-:(2021), pp. 1-7. ((Intervento presentato al convegno 39th IEEE VLSI Test Symposium, VTS 2021 tenutosi a usa nel 2021 [10.1109/VTS50974.2021.9441044]. 1-gen-2021 Rodriguez Condia, Josie E.Sonza Reorda, MatteoRech, P. + Combining_Architectural_Simulation_and_Software_Fault_Injection_for_a_Fast_and_Accurate_CNNs_Reliability_Evaluation_on_GPUs.pdf
A Compaction Method for STLs for GPU in-field test / Guerrero-Balaguera, Juan-David; Rodriguez Condia, J. E.; Sonza Reorda, M.. - ELETTRONICO. - (2022), pp. 454-459. ((Intervento presentato al convegno 2022 Design, Automation and Test in Europe Conference and Exhibition, DATE 2022 tenutosi a Antwerp (BE) nel 14-23 March 2022 [10.23919/DATE54114.2022.9774597]. 1-gen-2022 Guerrero-Balaguera Juan-DavidRodriguez Condia J. E.Sonza Reorda M. A_Compaction_Method_for_STLs_for_GPU_in-field_test.pdf
Design and Verification of an open-source SFU model for GPGPUs / Rodriguez Condia Josie, Esteban.; Guerrero-Balaguera, Juan-David; Moreno-Manrique, C. -F.; Reorda, M. S.. - ELETTRONICO. - (2020), pp. 1-6. ((Intervento presentato al convegno 17th Biennial Baltic Electronics Conference, BEC 2020 tenutosi a Tallin (Est) nel 2020 [10.1109/BEC49624.2020.9276748]. 1-gen-2020 Rodriguez Condia Josie Esteban.Guerrero-Balaguera Juan-DavidReorda M. S. + 09276748.pdf
Design techniques to improve the resilience of computing systems: software layer / Bosio, Alberto; Di Carlo, Stefano; Di Natale, Giorgio; Sonza Reorda, Matteo; Rodriguez Condia, Josie E.. - ELETTRONICO. - Cross-Layer Reliability of Computing Systems:(2020), pp. 95-112. [10.1049/PBCS057E_ch4] 1-gen-2020 Di Carlo, StefanoSonza Reorda, MatteoRodriguez Condia, Josie E. + PBCS0570_DiNatale_Chapter04_Proof.pdfI.4 - Software Layer.pdf
A dynamic hardware redundancy mechanism for the in-field fault detection in cores of GPGPUs / Rodriguez Condia, Josie E.; Narducci, Pierpaolo; Reorda, M. Sonza; Sterpone, L.. - ELETTRONICO. - (2020), pp. 1-6. ((Intervento presentato al convegno 2020 23rd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) tenutosi a Novi Sad, Serbia, Serbia nel 22-24 April 2020 [10.1109/DDECS50862.2020.9095665]. 1-gen-2020 Rodriguez Condia, Josie E.Reorda, M. SonzaSterpone, L. + 09095665.pdf
A dynamic reconfiguration mechanism to increase the reliability of GPGPUs / Rodriguez Condia, Josie E.; Narducci, Pierpaolo; Reorda, M. Sonza; Sterpone, L.. - ELETTRONICO. - (2020), pp. 1-6. ((Intervento presentato al convegno 2020 IEEE 38th VLSI Test Symposium (VTS) tenutosi a San Diego, USA nel 5-8 April 2020 [10.1109/VTS48691.2020.9107572]. 1-gen-2020 Rodriguez Condia, Josie E.Reorda, M. SonzaSterpone, L. + 09107572.pdf
DYRE: a DYnamic REconfigurable solution to increase GPGPU's reliability / Rodriguez Condia, Josie E.; Narducci, Pierpaolo; Sonza Reorda, Matteo; Sterpone, Luca. - In: THE JOURNAL OF SUPERCOMPUTING. - ISSN 0920-8542. - ELETTRONICO. - (2021). [10.1007/s11227-021-03751-2] 1-gen-2021 Rodriguez Condia, Josie E.Sonza Reorda, MatteoSterpone, Luca + Condia2021_Article_DYREADYnamicREconfigurableSolu.pdf
An Effective Method to Identify Microarchitectural Vulnerabilities in GPUs / Rodriguez Condia, Josie E.; Rech, Paolo; Fernandes dos Santos, Fernando; Carro, Luigi; Sonza Reorda, Matteo. - In: IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY. - ISSN 1530-4388. - ELETTRONICO. - 22:2(2022), pp. 129-141. [10.1109/TDMR.2022.3166260] 1-gen-2022 Rodriguez Condia, Josie E.Rech, PaoloCarro, LuigiSonza Reorda, Matteo + Transactions_on_device_and_materials_reliability_accepted_version.pdfAn_Effective_Method_to_Identify_Microarchitectural_Vulnerabilities_in_GPUs.pdf
EQUIPO DESCENTRALIZADO DE PROSPECCIÓN GEOELÉCTRICA DE NODOS RECONFIGURABLES / rodriguez condia, Josie; PEREZ HOLGUIN, Javier. - (2018). 1-gen-2018 rodriguez condia, josie + 1156-P RTA FONDO1-1.pdf
Evaluating low-level software-based hardening techniques for configurable GPU architectures / Goncalves, Marcio M.; Rodriguez Condia, Josie Esteban; Sonza Reorda, Matteo; Sterpone, Luca; Azambuja, Jose Rodrigo. - In: THE JOURNAL OF SUPERCOMPUTING. - ISSN 0920-8542. - ELETTRONICO. - 78:6(2022), pp. 8081-8105. [10.1007/s11227-021-04154-z] 1-gen-2022 Rodriguez Condia, Josie EstebanSonza Reorda, MatteoSterpone, Luca + Goncalves2022_Article_EvaluatingLow-levelSoftware-ba.pdfJSupercomp___Software_based_for_FlexGrip.pdf
Evaluating Software-based Hardening Techniques for General-Purpose Registers on a GPGPU / Goncalves, Marcio M.; Azambuja, Jose Rodrigo; Rodriguez Condia, Josie E.; Sonza Reorda, Matteo; Sterpone, Luca. - ELETTRONICO. - (2020), pp. 1-6. ((Intervento presentato al convegno 2020 IEEE Latin-American Test Symposium (LATS) tenutosi a Maceio, Brasil nel 30 March-2 April 2020 [10.1109/LATS49555.2020.9093682]. 1-gen-2020 Rodriguez Condia , Josie E.Sonza Reorda, MatteoSterpone, Luca + LATS_2020_paper.pdf09093682.pdf
An extended model to support detailed GPGPU reliability analysis / Du, B.; RODRIGUEZ CONDIA, JOSIE ESTEBAN; Reorda, M. S.. - ELETTRONICO. - (2019), pp. 1-6. ((Intervento presentato al convegno 14th IEEE International Conference on Design and Technology of Integrated Systems In Nanoscale Era, DTIS 2019 tenutosi a grc nel 2019 [10.1109/DTIS.2019.8735047]. 1-gen-2019 Du B.RODRIGUEZ CONDIA, JOSIE ESTEBANReorda M. S. camera ready version.pdf08735047.pdf
FlexGripPlus: An improved GPGPU model to support reliability analysis / Rodriguez Condia, Josie E.; Du, Boyang; Sonza Reorda, Matteo; Sterpone, Luca. - In: MICROELECTRONICS RELIABILITY. - ISSN 0026-2714. - 109:(2020), pp. 1-14. [10.1016/j.microrel.2020.113660] 1-gen-2020 Rodriguez Condia, Josie E.Du, BoyangSonza Reorda, MatteoSterpone, Luca journal-version-V20.pdf1-s2.0-S0026271419307978-main.pdf
High & low-level features modelling of nodes in WSNs using SystemC / Condia, Josie E. Rodriguez; Holguin, Wilson Javier Perez. - ELETTRONICO. - (2016), pp. 1-6. ((Intervento presentato al convegno 2016 IEEE 36th Central American and Panama Convention (CONCAPAN XXXVI) tenutosi a San jose, Costa Rica nel 9-11 Nov. 2016 [10.1109/CONCAPAN.2016.7942353]. 1-gen-2016 Condia, Josie E. Rodriguez + paper.pdf
Improving GPU register file reliability with a comprehensive ISA extension / Gonçalves, M. M.; Rodriguez Condia, Josie E.; Reorda, M. Sonza; Sterpone, L.; Azambuja, J. R.. - In: MICROELECTRONICS RELIABILITY. - ISSN 0026-2714. - ELETTRONICO. - (2020), pp. 113768-113776. [10.1016/j.microrel.2020.113768] 1-gen-2020 Rodriguez Condia, Josie E.Reorda, M. SonzaSterpone, L. + 1-s2.0-S0026271420305631-main.pdf
Modular Functional Testing: Targeting the Small Embedded Memories in GPUs / Rodriguez Condia, Josie E.; Sonza Reorda, M.. - ELETTRONICO. - (2021), pp. 205-233. [10.1007/978-3-030-81641-4_10] 1-gen-2021 Josie E. Rodriguez CondiaSonza Reorda M. Modular Functional Testing Targeting the Small Embedded Memories in GPUs 2021.pdf
A New Method to Generate Software Test Libraries for In-Field GPU Testing Resorting to High-Level Languages / Guerrero-Balaguera, Juan-David; Rodriguez Condia, Josie Esteban; Sonza Reorda, Matteo. - ELETTRONICO. - (2022), pp. 1-7. ((Intervento presentato al convegno 40th IEEE VLSI Test Symposium, VTS 2022 tenutosi a San Diego (USA) nel 25-27 April 2022 [10.1109/VTS52500.2021.9794225]. 1-gen-2022 Guerrero-Balaguera, Juan-DavidRodriguez Condia, Josie EstebanSonza Reorda, Matteo A_New_Method_to_Generate_Software_Test_Libraries_for_In-Field_GPU_Testing_Resorting_to_High-Level_Languages.pdf