ABED, SERGIU-MOHAMED

ABED, SERGIU-MOHAMED  

Dipartimento di Automatica e Informatica  

053209  

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Towards ISO 26262-compliant Vector Processors: Combining STLs and LBIST / Vilar De Farias, G., Kurada, D., Abed, S., Guerrero-Balaguera, J., Rodriguez Condia, J.E., Bagbaba, A.C., Da Silva, F.A., Sonza Reorda, M.. - ELETTRONICO. - (In corso di stampa). (34th IFIP/IEEE International Conference on Very Large Scale Integration SoC Limassol, Cyprus 11-14 October 2026). In corso di stampa Vilar de Farias,GustavoAbed,Sergiu-MohamedGuerrero-Balaguera,Juan-DavidRodriguez Condia, Josie EstebanSonza Reorda,Matteo + VLSI_SoC_2026_SS__reliability_and_functional_safety_in_vector_processors.pdf
Algorithm-based Fault Tolerance for RISC-V Vector Processors in Safety-critical AI Applications / Abed, S., Bagbaba, A.C., O'Shea, C., Rodriguez Condia, J.E., Sonza Reorda, M.. - (2026), pp. 1-7. (2026 IEEE 32nd International Symposium on On-Line Testing and Robust System Design (IOLTS) Polignano a Mare (ITA) 01-03 July 2026) [10.1109/iolts69666.2026.11633611]. 1-gen-2026 Abed, Sergiu-MohamedRodriguez Condia, Josie E.Sonza Reorda, Matteo + _IOLTS_2026__ABFT_in_Vector_Processors.pdfAlgorithm-based_Fault_Tolerance_for_RISC-V_Vector_Processors_in_Safety-critical_AI_Applications.pdf
Analyzing hardware accelerators’ reliability: from design exploration to fast evaluation with hyperscalers / Guerrero-Balaguera, J., Limas Sierra, R., Vilar De Farias, G., Abed, S., Bagbaba, A.C., Rodriguez Condia, J.E.. - ELETTRONICO. - (2026). (2026 17th IEEE Latin American Symposium on Circuits and Systems Arequipa (PE) 24-27 February 2026) [10.1109/LASCAS67804.2026.11457105]. 1-gen-2026 Guerrero-Balaguera, Juan-DavidLimas Sierra, RobertVilar de Farias, GustavoAbed, Sergiu-MohamedRodriguez Condia, Josie E. + lascas_final.pdfAnalyzing_Hardware_Accelerators_Reliability_From_Design_Exploration_to_Fast_Evaluation_with_Hyperscalers.pdf
Analysis and Mitigation of Soft-errors in GPU-accelerated Hyperspectral Image Classifiers / Abed, S., Guerrero-Balaguera, J., Condia, J.E.R., De Lucia, G., Lapegna, M., Reorda, M.S.. - ELETTRONICO. - (2025), pp. 131-134. (28th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2025 Lyon (FRA) 05-07 May 2025) [10.1109/ddecs63720.2025.11006812]. 1-gen-2025 Abed, Sergiu-MohamedGuerrero-Balaguera, Juan-DavidReorda, Matteo Sonza + Analysis_and_Mitigation_of_Soft-errors_in_GPU-accelerated_Hyperspectral_Image_Classifiers.pdf_DDECS_25__Analysis_and_Mitigation_of_Soft_errors_in_GPU_accelerated_Hyperspectral_Image_Classifiers___4_pages_free.pdf