Commercial SRAM-based FPGAs are widely used in aerospace applications thanks to their limited costs and high performances. Dynamic Partial Reconfigurability (DPR) allows to rewrite sections of the configuration memory of these devices while they are normally working. This is a powerful feature which provides advantages in terms of area, power consumption and flexibility. Moreover, DPR plays the main role in the recovery from faults that may occur in the configuration memory of the device when it operates in a radiation environment. Indeed, ionized particles which strike electronic devices, may cause various types of events. The Single Event Transient (SET) is a well-known phenomenon, which affects sensitive nodes causing transitory voltage spikes that can be sampled by a memory element, causing a fault. In this paper, an evaluation methodology for the errors caused by SETs during the reconfiguration of the configuration memory in SRAM-based FPGAs is presented. The evaluation methodology includes the fault model evaluation and the development of a fault injection and error evaluation workflow. The illustrated methodology has been applied on a physical device implementing a benchmark design and the obtained results are reported.

Radiation-induced Single Event Transient effects during the reconfiguration process of SRAM-based FPGAs / De Sio, C.; Azimi, S.; Bozzoli, L.; Du, B.; Sterpone, L.. - In: MICROELECTRONICS RELIABILITY. - ISSN 0026-2714. - ELETTRONICO. - (2019). [10.1016/j.microrel.2019.06.034]

Radiation-induced Single Event Transient effects during the reconfiguration process of SRAM-based FPGAs

De Sio, C.;Azimi, S.;Bozzoli, L.;Du, B.;Sterpone, L.
2019

Abstract

Commercial SRAM-based FPGAs are widely used in aerospace applications thanks to their limited costs and high performances. Dynamic Partial Reconfigurability (DPR) allows to rewrite sections of the configuration memory of these devices while they are normally working. This is a powerful feature which provides advantages in terms of area, power consumption and flexibility. Moreover, DPR plays the main role in the recovery from faults that may occur in the configuration memory of the device when it operates in a radiation environment. Indeed, ionized particles which strike electronic devices, may cause various types of events. The Single Event Transient (SET) is a well-known phenomenon, which affects sensitive nodes causing transitory voltage spikes that can be sampled by a memory element, causing a fault. In this paper, an evaluation methodology for the errors caused by SETs during the reconfiguration of the configuration memory in SRAM-based FPGAs is presented. The evaluation methodology includes the fault model evaluation and the development of a fault injection and error evaluation workflow. The illustrated methodology has been applied on a physical device implementing a benchmark design and the obtained results are reported.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/2758692
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