Archivio Istituzionale della RicercaDU, BOYANG
DU, BOYANG
Dipartimento di Automatica e Informatica
Boyang, D.
031122
A Neutron Generator Testing Platform for the Radiation Analysis of SRAM-based FPGAs
2021 Bozzoli, L.; De Sio, C.; Du, B.; Sterpone, L.
On the Mitigation of Single Event Transient in 3D LUT by In-Cell Layout Resizing
2020 Azimi, Sarah; Du, Boyang; DE SIO, Corrado; Sterpone, Luca
A new Method for the Analysis of Radiation-induced Effects in 3D VLSI Face-to-Back LUTs
2019 Sterpone, Luca; Bozzoli, Ludovica; DE SIO, Corrado; Du, Boyang; Azimi, Sarah
An extended model to support detailed GPGPU reliability analysis
2019 Du, B.; RODRIGUEZ CONDIA, JOSIE ESTEBAN; Reorda, M. S.
An open source embedded-GPGPU model for the accurate analysis and mitigation of SEU effects
2019 Du, B.; Rodriguez Condia, Josie E.; Sonza Reorda, M.; Sterpone, L.
Analysis of Radiation-induced SETs in 3D VLSI Face-to-Back LUTs
2019 Sterpone, Luca; Bozzoli, Ludovica; DE SIO, Corrado; Du, Boyang; Azimi, Sarah
On the evaluation of SEU effects in GPGPUs
2019 Du, B.; Rodriguez Condia, Josie E.; Sonza Reorda, M.; Sterpone, L.
On the Reliability of Convolutional Neural Network Implementation on SRAM-based FPGA
2019 Du, Boyang; Azimi, Sarah; DE SIO, Corrado; Bozzoli, Ludovica; Sterpone, Luca
Rad-Ray: A new Simulation Tool for the Analysis of Heavy Ions-induced SETs on ICs
2019 Sterpone, Luca; Azimi, Sarah; Du, Boyang; Luoni, Francesca
SETA-RAY: A New IDE tool for Predicting, Analyzing and Mitigating Radiation-induced Soft Errors on FPGAs
2019 Sterpone, Luca; Du, Boyang; Azimi, Sarah
A Novel Error Rate Estimation Approach for UltraScale+ SRAM-based FPGAs
2018 Sterpone, Luca; Azimi, Sarah; Bozzoli, Ludovica; Du, Boyang; Lange, Thomas; Maximilien, Glorieux; Dan, Alexandrescu; Cesar Boatella, Polo; MERODIO CODINACHS, David
A Zero-Timing Overhead SET Mitigation Approach for Flash-based FPGAs
2018 Azimi, Sarah; Du, Boyang; Sterpone, Luca
About the functional test of the GPGPU scheduler
2018 Du, B.; RODRIGUEZ CONDIA, JOSIE ESTEBAN; Sonza Reorda, M.; Sterpone, L.
On the Mitigation of Single Event Transients on Flash-based FPGAs
2018 Azimi, Sarah; Du, Boyang; Sterpone, Luca
SETA: A CAD tool for Single Event Transient Analysis and Mitigation on Flash-based FPGAs
2018 Azimi, Sarah; Du, Boyang; Sterpone, Luca; MERODIO CODINACHS, David; Cattaneo, Luca
Effective Mitigation of Radiation-induced Single Event Transient on Flash-based FPGAs
2017 Azimi, Sarah; Du, Boyang; Sterpone, Luca; Merodio Codinachs, David; Grimoldi, Raoul
Fault tolerant electronic system design
2017 Du, Boyang; Sterpone, Luca
Online monitoring soft errors in reconfigurable FPGA during radiation test
2017 Du, Boyang; Sterpone, Luca
A new EDA flow for the Mitigation of SEUs in Dynamic Reconfigurable FPGAs
2016 Du, Boyang; Sterpone, Luca; Codinachs, David Merodio
A New Simulation-Based Fault Injection Approach for the Evaluation of Transient Errors in GPGPUs
2016 Azimi, Sarah; Du, Boyang; Sterpone, Luca
| Citazione | Data di pubblicazione | Autori | File |
|---|---|---|---|
| A Neutron Generator Testing Platform for the Radiation Analysis of SRAM-based FPGAs / Bozzoli, L.; De Sio, C.; Du, B.; Sterpone, L.. - ELETTRONICO. - (2021), pp. 1-5. (Intervento presentato al convegno IEEE International Instrumentation and Measurement Technology Conference (I2MTC) tenutosi a Glasgow, United Kingdom nel 17-20 May 2021) [10.1109/I2MTC50364.2021.9459804]. | 1-gen-2021 | L. BozzoliC. De SioB. DuL. Sterpone | 09459804.pdf |
| On the Mitigation of Single Event Transient in 3D LUT by In-Cell Layout Resizing / Azimi, Sarah; Du, Boyang; DE SIO, Corrado; Sterpone, Luca. - ELETTRONICO. - (2020), pp. 1-4. (Intervento presentato al convegno European Conference on Radiation and its Effects on Components and Systems (RADECS) tenutosi a Online event) [10.1109/RADECS50773.2020.9857719]. | 1-gen-2020 | Sarah AzimiBoyang DuCorrado De SioLuca Sterpone | RADECS2020_CameraReady.pdf; On_the_Mitigation_of_Single_Event_Transient_in_3D_LUT_by_In-Cell_Layout_Resizing.pdf |
| A new Method for the Analysis of Radiation-induced Effects in 3D VLSI Face-to-Back LUTs / Sterpone, Luca; Bozzoli, Ludovica; DE SIO, Corrado; Du, Boyang; Azimi, Sarah. - ELETTRONICO. - (2019), pp. 205-208. (Intervento presentato al convegno IEEE International Conference on Synthesis, modeling, analysis and Simulation methods and applications to circuit design (SMACD)) [10.1109/SMACD.2019.8795296]. | 1-gen-2019 | Luca SterponeLudovica BozzoliCorrado De SioBoyang DuSarah Azimi | SMACD2019.pdf; A_new_Method_for_the_Analysis_of_Radiation-induced_Effects_in_3D_VLSI_Face-to-Back_LUTs.pdf |
| An extended model to support detailed GPGPU reliability analysis / Du, B.; RODRIGUEZ CONDIA, JOSIE ESTEBAN; Reorda, M. S.. - ELETTRONICO. - (2019), pp. 1-6. (Intervento presentato al convegno 14th IEEE International Conference on Design and Technology of Integrated Systems In Nanoscale Era, DTIS 2019 tenutosi a grc nel 2019) [10.1109/DTIS.2019.8735047]. | 1-gen-2019 | Du B.RODRIGUEZ CONDIA, JOSIE ESTEBANReorda M. S. | camera ready version.pdf |
| An open source embedded-GPGPU model for the accurate analysis and mitigation of SEU effects / Du, B.; Rodriguez Condia, Josie E.; Sonza Reorda, M.; Sterpone, L.. - (2019), pp. 1-4. (Intervento presentato al convegno 2019 19th European Conference on Radiation and Its Effects on Components and Systems tenutosi a Montpellier (France) nel 16-20 September 2019) [10.1109/RADECS47380.2019.9745670]. | 1-gen-2019 | Du, B.Rodriguez Condia, Josie E.Sonza Reorda, M.Sterpone, L. | An_open_source_embedded-GPGPU_model_for_the_accurate_analysis_and_mitigation_of_SEU_effects.pdf |
| Analysis of Radiation-induced SETs in 3D VLSI Face-to-Back LUTs / Sterpone, Luca; Bozzoli, Ludovica; DE SIO, Corrado; Du, Boyang; Azimi, Sarah. - (2019). (Intervento presentato al convegno 30th IEEE Radiation and its Effects on Components and Systems (RADECS 2019)). | 1-gen-2019 | Luca SterponeLudovica BozzoliCorrado De SioBoyang DuSarah Azimi | - |
| On the evaluation of SEU effects in GPGPUs / Du, B.; Rodriguez Condia, Josie E.; Sonza Reorda, M.; Sterpone, L.. - ELETTRONICO. - (2019), pp. 1-6. (Intervento presentato al convegno 2019 IEEE Latin American Test Symposium (LATS) tenutosi a Santiago, Chile nel 11-13 March 2019) [10.1109/LATW.2019.8704643]. | 1-gen-2019 | Du, B.Rodriguez Condia, Josie E.Sonza Reorda, M.Sterpone, L. | - |
| On the Reliability of Convolutional Neural Network Implementation on SRAM-based FPGA / Du, Boyang; Azimi, Sarah; DE SIO, Corrado; Bozzoli, Ludovica; Sterpone, Luca. - ELETTRONICO. - (2019). (Intervento presentato al convegno The 32nd IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology tenutosi a ESA-ESTEC & TU Delft, Netherlands nel 02/10/2019 - 04/10/2019) [10.1109/DFT.2019.8875362]. | 1-gen-2019 | Boyang DuSarah AzimiCorrado De SioLudovica BozzoliLuca Sterpone | 08875362.pdf |
| Rad-Ray: A new Simulation Tool for the Analysis of Heavy Ions-induced SETs on ICs / Sterpone, Luca; Azimi, Sarah; Du, Boyang; Luoni, Francesca. - ELETTRONICO. - (2019). (Intervento presentato al convegno 30th IEEE Radiation and its Effects on Components and Systems (RADECS 2019)). | 1-gen-2019 | Luca SterponeSarah AzimiBoyang Du + | - |
| SETA-RAY: A New IDE tool for Predicting, Analyzing and Mitigating Radiation-induced Soft Errors on FPGAs / Sterpone, Luca; Du, Boyang; Azimi, Sarah. - ELETTRONICO. - (2019). (Intervento presentato al convegno IEEE design, automation and test in Europe - DATE 2019). | 1-gen-2019 | luca sterponeboyang duSarah azimi | date_CameraReady.pdf |
| A Novel Error Rate Estimation Approach for UltraScale+ SRAM-based FPGAs / Sterpone, Luca; Azimi, Sarah; Bozzoli, Ludovica; Du, Boyang; Lange, Thomas; Maximilien, Glorieux; Dan, Alexandrescu; Cesar Boatella, Polo; MERODIO CODINACHS, David. - (2018), pp. 120-126. (Intervento presentato al convegno IEEE Adaptive Hardware and Systems (AHS), 2018 NASA/ESA Conference) [10.1109/AHS.2018.8541474]. | 1-gen-2018 | STERPONE, LUCAAZIMI, SARAHBOZZOLI, LUDOVICADU, BOYANGLANGE, THOMASMERODIO CODINACHS, DAVID + | AHS2019.pdf |
| A Zero-Timing Overhead SET Mitigation Approach for Flash-based FPGAs / Azimi, Sarah; Du, Boyang; Sterpone, Luca. - ELETTRONICO. - (2018). (Intervento presentato al convegno IEEE Radiation and its Effects on Component and Systems - RADECS 2018 tenutosi a Gothenburg- Sweden nel 16-21 September 2018) [10.1109/RADECS45761.2018.9328665]. | 1-gen-2018 | Sarah AzimiBoyang DuLuca Sterpone | RADECS2018_final version.pdf; A_Zero-Timing_Overhead_SET_Mitigation_Approach_for_Flash-based_FPGAs.pdf |
| About the functional test of the GPGPU scheduler / Du, B.; RODRIGUEZ CONDIA, JOSIE ESTEBAN; Sonza Reorda, M.; Sterpone, L.. - ELETTRONICO. - (2018). (Intervento presentato al convegno 24th IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2018) tenutosi a Hotel Cap Roig, Platja d’Aro, Costa Brava, Spain nel July 2-4, 2018) [10.1109/IOLTS.2018.8474174]. | 1-gen-2018 | B. DuRODRIGUEZ CONDIA, JOSIE ESTEBANM. Sonza ReordaL. Sterpone | IOLTS18 v Camera Ready.pdf; About_the_functional_test_of_the_GPGPU_scheduler.pdf |
| On the Mitigation of Single Event Transients on Flash-based FPGAs / Azimi, Sarah; Du, Boyang; Sterpone, Luca. - ELETTRONICO. - (2018). (Intervento presentato al convegno IEEE European Test Symposium (ETS 2018) tenutosi a Bremen, Germany nel 28 May- 01 June, 2018) [10.1109/ETS.2018.8400715]. | 1-gen-2018 | Sarah AzimiBoyang DuLuca Sterpone | ETS2018.pdf |
| SETA: A CAD tool for Single Event Transient Analysis and Mitigation on Flash-based FPGAs / Azimi, Sarah; Du, Boyang; Sterpone, Luca; MERODIO CODINACHS, David; Cattaneo, Luca. - ELETTRONICO. - (2018), pp. 49-52. (Intervento presentato al convegno 15th IEEE International Conference on Synthesis, modeling, analysis and Simulation methods and applications to circuit design tenutosi a Prague, Czech Republic nel 2 July- 5 July 2018) [10.1109/SMACD.2018.8434897]. | 1-gen-2018 | Sarah AzimiBoyang DuLuca SterponeDavid Merodio CodinachsCATTANEO, LUCA | SMACD2018_CAMERAREADY.pdf; SETA_A_CAD_Tool_for_Single_Event_Transient_Analysis_and_Mitigation_on_Flash-Based_FPGAs.pdf |
| Effective Mitigation of Radiation-induced Single Event Transient on Flash-based FPGAs / Azimi, Sarah; Du, Boyang; Sterpone, Luca; Merodio Codinachs, David; Grimoldi, Raoul. - ELETTRONICO. - (2017), pp. 203-208. (Intervento presentato al convegno GLSVLSI '17 tenutosi a Banff, Alberta, Canada nel May 10 - 12, 2017) [10.1145/3060403.3060454]. | 1-gen-2017 | AZIMI, SARAHDU, BOYANGSTERPONE, LUCA + | - |
| Fault tolerant electronic system design / Du, Boyang; Sterpone, Luca. - 2017-:(2017), pp. 1-6. (Intervento presentato al convegno 48th IEEE International Test Conference, ITC 2017 tenutosi a Forth Worth Convention Center, usa nel 2017) [10.1109/TEST.2017.8242080]. | 1-gen-2017 | Du, BoyangSterpone, Luca | - |
| Online monitoring soft errors in reconfigurable FPGA during radiation test / Du, Boyang; Sterpone, Luca. - (2017), pp. 1-5. (Intervento presentato al convegno Instrumentation and Measurement Technology Conference (I2MTC) tenutosi a 22-25 May 2017 nel Turin (ITA)) [10.1109/I2MTC.2017.7969976]. | 1-gen-2017 | DU, BOYANGSTERPONE, LUCA | Online_monitoring_soft_errors_in_reconfigurable_FPGA_during_radiation_test.pdf |
| A new EDA flow for the Mitigation of SEUs in Dynamic Reconfigurable FPGAs / Du, Boyang; Sterpone, Luca; Codinachs, David Merodio. - ELETTRONICO. - (2016). (Intervento presentato al convegno IEEE European Test Symposium tenutosi a The Netherlands (NL) nel May 23 - 27, 2016) [10.1109/ETS.2016.7519323]. | 1-gen-2016 | DU, BOYANGSTERPONE, LUCA + | - |
| A New Simulation-Based Fault Injection Approach for the Evaluation of Transient Errors in GPGPUs / Azimi, Sarah; Du, Boyang; Sterpone, Luca. - ELETTRONICO. - 9637:(2016), pp. 388-400. (Intervento presentato al convegno Architecture of Computing Systems -- ARCS 2016 tenutosi a Norimberga nel 4 - 7 April 2016) [10.1007/978-3-319-30695-7_29]. | 1-gen-2016 | AZIMI, SARAHDU, BOYANGSTERPONE, LUCA | - |