PORTO @ Archivio Istituzionale della Ricerca

LAVAGNO, Luciano
 Distribuzione geografica
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Continente #
NA - Nord America 28.199
EU - Europa 23.083
AS - Asia 8.792
SA - Sud America 1.237
AF - Africa 226
OC - Oceania 17
Continente sconosciuto - Info sul continente non disponibili 11
AN - Antartide 1
Totale 61.566
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Nazione #
US - Stati Uniti d'America 28.019
IT - Italia 4.749
GB - Regno Unito 4.670
DE - Germania 4.473
FR - Francia 3.689
SG - Singapore 2.906
CN - Cina 2.676
UA - Ucraina 1.800
BR - Brasile 1.038
RU - Federazione Russa 649
KR - Corea 613
HK - Hong Kong 581
TR - Turchia 571
CH - Svizzera 535
IE - Irlanda 517
NL - Olanda 467
SE - Svezia 369
FI - Finlandia 363
JP - Giappone 356
VN - Vietnam 266
AT - Austria 177
BE - Belgio 155
IN - India 150
CA - Canada 111
JO - Giordania 101
MY - Malesia 98
ID - Indonesia 97
EG - Egitto 85
PK - Pakistan 81
AR - Argentina 74
PL - Polonia 69
IL - Israele 59
ES - Italia 58
IR - Iran 51
EU - Europa 49
ZA - Sudafrica 49
MX - Messico 45
PT - Portogallo 39
BD - Bangladesh 37
IQ - Iraq 37
TW - Taiwan 32
EC - Ecuador 30
CL - Cile 29
AP - ???statistics.table.value.countryCode.AP??? 28
GR - Grecia 26
RO - Romania 24
AE - Emirati Arabi Uniti 22
SA - Arabia Saudita 21
CO - Colombia 17
CZ - Repubblica Ceca 17
EE - Estonia 17
TN - Tunisia 17
UZ - Uzbekistan 17
SN - Senegal 16
HR - Croazia 14
KH - Cambogia 14
VE - Venezuela 14
PY - Paraguay 12
AL - Albania 11
NO - Norvegia 11
DZ - Algeria 10
NG - Nigeria 10
PE - Perù 10
UY - Uruguay 10
AU - Australia 9
DK - Danimarca 9
LT - Lituania 9
SK - Slovacchia (Repubblica Slovacca) 9
TH - Thailandia 9
KE - Kenya 8
MA - Marocco 8
NZ - Nuova Zelanda 8
AZ - Azerbaigian 7
LV - Lettonia 7
BG - Bulgaria 6
DO - Repubblica Dominicana 6
ET - Etiopia 6
GH - Ghana 6
LU - Lussemburgo 6
CR - Costa Rica 5
KZ - Kazakistan 5
OM - Oman 5
PA - Panama 5
PH - Filippine 5
BA - Bosnia-Erzegovina 4
RS - Serbia 4
A1 - Anonimo 3
BY - Bielorussia 3
CI - Costa d'Avorio 3
TJ - Tagikistan 3
A2 - ???statistics.table.value.countryCode.A2??? 2
AO - Angola 2
BW - Botswana 2
GE - Georgia 2
GY - Guiana 2
HN - Honduras 2
JM - Giamaica 2
KW - Kuwait 2
LK - Sri Lanka 2
MD - Moldavia 2
Totale 61.536
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Città #
Ashburn 6.529
Southend 4.205
Seattle 3.686
Fairfield 2.457
Singapore 1.434
Woodbridge 1.182
Houston 973
Jacksonville 920
Turin 904
Cambridge 878
Princeton 878
Ann Arbor 840
Chandler 829
Wilmington 786
San Ramon 686
Boardman 671
Torino 600
Beijing 569
Berlin 532
Hong Kong 525
Dublin 506
Bern 488
Izmir 450
Milan 429
Council Bluffs 422
Helsinki 310
Santa Clara 292
Buffalo 291
Des Moines 285
Zhengzhou 275
Shanghai 267
San Donato Milanese 264
Chicago 263
Dallas 260
Umatate 256
Pennsylvania Furnace 221
Baltimore 219
Zaporozhye 210
Overberg 200
Monopoli 156
San Francisco 155
Brussels 146
Saint Petersburg 142
Seoul 138
Hefei 131
Hangzhou 121
San Diego 112
Ho Chi Minh City 107
Mountain View 106
Guangzhou 103
Los Angeles 100
Vienna 100
Bologna 99
Dearborn 98
Padua 94
Redwood City 94
Amsterdam 88
Dayton 85
Norwalk 85
São Paulo 77
New York 74
Jakarta 71
Nürnberg 68
Hanoi 65
San Jose 61
Fremont 60
Rome 58
Munich 57
Nuremberg 56
Toronto 55
Las Vegas 54
Malatya 53
London 51
Melun 50
Phoenix 50
Kraków 49
Yubileyny 48
Washington 45
Shenzhen 44
Ningbo 42
Atlanta 41
Herkenbosch 39
Andover 38
Nanjing 38
Istanbul 34
Modena 34
Islamabad 33
Frankfurt 31
Frankfurt am Main 31
Moscow 30
Redmond 30
Cangzhou 29
Paris 29
Rio de Janeiro 29
Columbus 28
Winston Salem 27
Cairo 26
Lappeenranta 26
Jinan 25
Kunming 24
Totale 40.062
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Nome #
Designing parameterizable hardware IPs in a model-based design environment for high-level synthesis 642
Early Power Estimation for System-on-Chip Designs 567
Speeding-up heuristic allocation, scheduling and binding with SAT-based abstraction/refinement techniques 550
Energy-aware parallelization flow and toolset for C code 531
High-level Synthesis for Semi-global Matching: Is the juice worth the squeeze? 503
FASTCUDA: Open Source FPGA Accelerator & Hardware-Software Codesign Toolset for CUDA Kernels 481
Baseband analog front-end and digital back-end for reconfigurable multi-standard terminals 471
Online Authentication and Key Establishment Scheme for Heterogeneous Sensor Networks 449
Acceleration by Inline Cache for Memory-Intensive Algorithms on FPGA via High-Level Synthesis 448
An Efficient Data Aggregation Algorithm for Cluster-based Sensor Network 441
A Tagless Indoor Localization System Based on Capacitive Sensing Technology 437
Integrated Toolset for WSN Application Planning, Development, Commissioning and Maintenance: The WSN-DPCM ARTEMIS-JU Project 431
Efficient FPGA Implementation of OpenCL High-Performance Computing Applications via High-Level Synthesis 422
Design Space Exploration and Synthesis for Digital Signal Processing Algorithms from Simulink Models 419
Dynamic Trace-Based Data Dependency Analysis for Parallelization of C Programs 406
A Contactless Sensor for Human Body Identification using RF Absorption Signatures 404
Leveraging BIM Interoperability for UWB-Based WSN Planning 394
Interactive Trace-Based Analysis Toolset for Manual Parallelization of C Programs 388
An Authentication and Key Establishment Scheme for the IP-Based Wireless Sensor Networks 385
A routing-algorithm-aware design tool for indoor wireless sensor networks 380
Energy Optimization Framework for WSN Design 376
SafeRazor: Metastability-Robust Adaptive Clocking in Resilient Circuits 376
Performance of machine learning classifiers for indoor person localization with capacitive sensors 367
An Energy and Memory-Efficient Key Management Scheme for Mobile Heterogeneous Sensor Networks 366
Long range, high sensitivity, low noise capacitive sensor for tagless indoor human localization 352
Capacitive sensor for tagless remote human identification using body frequency absorption signatures 352
Automatic Test Bench Generation for Simulation-based Validation 350
ECOSCALE: Reconfigurable computing and runtime system for future exascale systems 350
Exploiting area/delay tradeoffs in high-level synthesis 346
Desynchronization: Synthesis of asynchronous circuits from synchronous specifications 341
A comparison of software platforms for Wireless Sensor Networks: MANTIS, TinyOS and ZigBee 335
Energy Optimization at the MAC Layer for a Forest Fire Monitoring Wireless Sensor Network 324
Routing-aware design of indoor wireless sensor networks using an interactive tool 323
A Symbolic Approach for the Combined Solution of Scheduling and Allocation 320
Improving Electro-Magnetic Interference of Embedded Systems Through Jittered-Delay Desynchronization 320
Energy-efficient FPGA Implementation of the k-Nearest Neighbors Algorithm Using OpenCL 307
A BMC-Based Formulation for the Scheduling Problem of Hardware Systems 306
High Performance and Low Power Monte Carlo Methods to Option Pricing Models via High Level Design and Synthesis 306
A Framework for Modeling, Simulation and Automatic Code Generation of Sensor Network Application 296
Efficient energy Consumption and Node Distribution Algorithm of 802.15.4 Physical Layer for WSN 296
A Fully-automated Desynchronization Flow for Synchronous Circuits 295
A Fully-automated Desynchronization Flow for Synchronous Circuits 294
On the models for asynchronous circuit behaviour with {OR} causality. 293
NN2FPGA: Optimizing CNN Inference on FPGAs With Binary Integer Programming 288
Simulink Modeling of the 802.15.4 Physical Layer for Model-Based Design of Wireless Sensor Networks 287
Virtual Platform-Based Design Space Exploration of Power-Efficient Distributed Embedded Applications 287
Realistic performance-constrained pipelining in high-level synthesis 286
Porting application between wireless sensor network software platforms: TinyOS, MANTIS and ZigBee 286
Simulink-based HW/SW codesign of embedded neuro-fuzzy systems 283
Verification of Similar FSMs by Mixing Incremental Re-encoding Reachability Analysis and Combinational Checks 283
System-level test bench generation in a co-design framework. 282
Optimal and Heuristic Scheduling Algorithms for Asynchronous High-Level Synthesis 282
Efficient methods for embedded system design space exploration. 280
A BMC-Based Formulation for the Scheduling Problem in Highly Constrained Hardware Systems 268
Behavioral-level test vector generation for system-on-chip designs. 267
Deriving petri nets from finite transition systems. 267
A Case Study in Embedded System Design: an Engine Control Unit 267
Design Space Exploration of a Stereo Vision System using High-Level Synthesis 266
Performance and energy-efficient implementation of a smart city application on FPGAs 265
Technology mapping of speed-independent circuits based on combinational decomposition and resynthesis 264
Wireless Sensor Networks 262
Energy and Throughput Optimization of a ZigBee-Compatible MAC Protocol for Wireless Sensor Networks 262
An algorithm for selecting the cluster leader in a partially connected sensor network 261
Disjunctive Partitioning And Partial Iterative Squaring: An Effective Approach For Symbolic Traversal Of Large Circuits 260
High-Level Annotation of Routing Congestion for Xilinx Vivado HLS Designs 260
Evaluating system dependability in a co-design framework. 258
Rapid-Prototyping of Embedded Systems via Reprogrammable Devices 257
High-Level Internet of Things Applications Development Using Wireless Sensor Networks 257
LP-HLS: Automatic power-intent generation for high-level synthesis based hardware implementation flow 257
A Graph Neural Network Model for Fast and Accurate Quality of Result Estimation for High-Level Synthesis 257
High sensitivity, low noise front-end for long range capacitive sensors for tagless indoor human localization 256
HEAP: A Highly Efficient Adaptive Multi-processor Framework 254
Model-based hardware/software synthesis for wireless sensor network applications 251
EU FP7-288307 Pharaon Project: Parallel and Heterogeneous Architecture for Real-Time Applications 248
Enhancing FSM Traversal by Temporary Re-Encoding 247
Electronic Design Automation for Integrated Circuits Handbook: EDA for IC implementation, circuit design and process technology 244
A mutual authentication and key establishment scheme for heterogeneous sensor networks supporting nodes mobility 243
Design of pseudo-log image transform IP in an HLS-based memory management framework 243
A case study in computer-aided co-design of embedded controllers. 242
CNN-on-AWS: Efficient Allocation of Multi-Kernel Applications on Multi-FPGA Platforms 242
A reconfigurable processor architecture and software development environment for embedded systems 240
E2RINA: an Energy Efficient and Reliable In-Network Aggregation for Clustered Wireless Sensor Networks 240
Analysis and implementation of the semi-global matching 3D vision algorithm using code transformations and high-level synthesis 240
Low power methodology for an ASIC design flow based on high-level synthesis 240
Asynchronous on-chip networks 237
MEOW: Model-Based Networks Design of an Energy-Optimized Protocol Stack for Wireless Sensor 237
Metropolis: an integrated environment for electronic system design 237
Hardware-software codesign of embedded systems. 237
Simulink-based hardware/software trade-off analysis technique 236
A key management scheme supporting node mobility in heterogeneous sensor networks 232
A Hardware/Software Co-design Flow and IP Library Based on Simulink 231
Trade-off evaluation in embedded system design via co-simulation 230
An effective key management scheme for mobile heterogeneous sensor networks 230
Compilation-based software performance estimation for system level design 229
An optimizing C front-end for hardware synthesis 229
Modeling, hardware in the loop simulation and code generation for wireless sensor networks based on ZigBee and TinyOS platforms 228
Quasi-static scheduling of independent tasks for reactive systems 227
HEAP: A Highly Efficient Adaptive multi-Processor framework 227
Verification and synthesis of counters based on symbolic techniques 227
Design Flow for a Reconfigurable Processor 226
Totale 31.169
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Categoria #
all - tutte 175.001
article - articoli 67.808
book - libri 4.271
conference - conferenze 90.208
curatela - curatele 1.210
other - altro 0
patent - brevetti 982
selected - selezionate 0
volume - volumi 10.522
Totale 350.002
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/20212.711 0 0 0 0 329 442 213 402 248 577 329 171
2021/20222.644 176 195 25 126 79 204 139 105 161 229 493 712
2022/20234.637 384 705 105 253 374 595 514 192 434 47 221 813
2023/20241.582 166 96 85 89 189 226 74 126 39 54 179 259
2024/20255.241 139 647 257 574 382 296 265 366 959 362 398 596
2025/20264.580 1.045 809 1.110 1.459 157 0 0 0 0 0 0 0
Totale 62.086