Archivio Istituzionale della RicercaCurrent design methodologies for embedded systems often force the designer to evaluate early in the design process architectural choices that will heavily impact the cost and performance of the final product. Examples of these choices are hardware/software partitioning, choice of the micro-controller, and choice of a run-time scheduling method. This paper describes how to help the designer in this task, by providing a flexible co-simulation environment in which these alternatives can be interactively evaluated.
Trade-off evaluation in embedded system design via co-simulation / Passerone, Claudio; Lavagno, Luciano; Sansoe', Claudio; Chiodo, M.; SANGIOVANNI VINCENTELLI, A.. - (1997), pp. 291-297. (Intervento presentato al convegno Asia and South Pacific Design Automation Conference tenutosi a Chiba (JPN) nel January 28-31, 1997) [10.1109/ASPDAC.1997.600159].
Trade-off evaluation in embedded system design via co-simulation
PASSERONE, Claudio;LAVAGNO, Luciano;SANSOE', Claudio;
1997
Abstract
Current design methodologies for embedded systems often force the designer to evaluate early in the design process architectural choices that will heavily impact the cost and performance of the final product. Examples of these choices are hardware/software partitioning, choice of the micro-controller, and choice of a run-time scheduling method. This paper describes how to help the designer in this task, by providing a flexible co-simulation environment in which these alternatives can be interactively evaluated.
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https://hdl.handle.net/11583/1416420
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