RESTIFO, MARCO
RESTIFO, MARCO
Dipartimento di Automatica e Informatica
038167
About on-line functionally untestable fault identification in microprocessor cores for safety-critical applications
2018-01-01 Cantoro, R.; Firrincieli, Andrea; Piumatti, D.; Restifo, M.; Sanchez, E.; Reorda, M. Sonza
A Comprehensive Methodology for Stress Procedures Evaluation and Comparison for Burn-In of Automotive SoC
2017-01-01 Bernardi, Paolo; Appello, Davide; Giacopelli, Giampaolo; Motta, Alessandro; Pagani, Alberto; Pollaccia, Giorgio; Rabbi, Christian; Restifo, Marco; Ruberg, Priit; Sanchez, Ernesto; Villa, Claudio Maria; Venini, Federico
Defeating Hardware Trojan through Software Obfuscation
2017-01-01 Marcelli, Andrea; Restifo, Marco; SANCHEZ SANCHEZ, EDGAR ERNESTO; Squillero, Giovanni
A DMA and CACHE-based stress schema for burn-in of automotive microcontroller
2017-01-01 Bernardi, Paolo; Cantoro, Riccardo; Gianotto, L.; Restifo, Marco; SANCHEZ SANCHEZ, EDGAR ERNESTO; Venini, Federico; Appello, D.
Effective Screening of Automotive SoCs by Combining Burn-In and System Level Test
2019-01-01 COSTA DE ALMEIDA, ANTONIO FELIPE; Bernardi, P.; Calabrese, D.; Restifo, M.; Reorda, M. S.; Appello, D.; Pollaccia, G.; Tancorre, V.; Ugioli, R.; Zoppi, G.
An Evolutionary Approach to Hardware Encryption and Trojan-Horse Mitigation
2017-01-01 Marcelli, Andrea; Restifo, Marco; Sanchez, Ernesto; Squillero, Giovanni
A hybrid in-field self-test technique for SoCs
2019-01-01 Carbonara, S.; Bernardi, P.; Restifo, M.
On the in-field test of embedded memories
2017-01-01 Bernardi, Paolo; Restifo, Marco; SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo
On-Line Software-based Self-Test for ECC of Embedded RAM Memories
2017-01-01 Restifo, Marco; Bernardi, Paolo; DE LUCA, Sergio; Sansonetti, Alessandro
Scan chain encryption for the test, diagnosis and debug of secure circuits
2017-01-01 Da Silva, Mathieu; Flottes, Marie Lise; DI NATALE, Giorgio; Rouzeyre, Bruno; Prinetto, Paolo Ernesto; Restifo, Marco
Citazione | Data di pubblicazione | Autori | File |
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About on-line functionally untestable fault identification in microprocessor cores for safety-critical applications / Cantoro, R.; Firrincieli, Andrea; Piumatti, D.; Restifo, M.; Sanchez, E.; Reorda, M. Sonza. - STAMPA. - 2018-:(2018), pp. 1-6. ((Intervento presentato al convegno 19th IEEE Latin-American Test Symposium, LATS 2018 tenutosi a bra nel 2018 [10.1109/LATW.2018.8349679]. | 1-gen-2018 | Cantoro, R.FIRRINCIELI, ANDREAPiumatti, D.Restifo, M.Sanchez, E.Reorda, M. Sonza | 08349679.pdf; lats18 preprint.pdf |
A Comprehensive Methodology for Stress Procedures Evaluation and Comparison for Burn-In of Automotive SoC / Bernardi, Paolo; Appello, Davide; Giacopelli, Giampaolo; Motta, Alessandro; Pagani, Alberto; Pollaccia, Giorgio; Rabbi, Christian; Restifo, Marco; Ruberg, Priit; Sanchez, Ernesto; Villa, Claudio Maria; Venini, Federico. - (2017). ((Intervento presentato al convegno Design, Automation and Test in Europe Conference and Exhibition (DATE2017). | 1-gen-2017 | BERNARDI, PAOLORESTIFO, MARCOSanchez, ErnestoVENINI, FEDERICO + | - |
Defeating Hardware Trojan through Software Obfuscation / Marcelli, Andrea; Restifo, Marco; SANCHEZ SANCHEZ, EDGAR ERNESTO; Squillero, Giovanni. - ELETTRONICO. - (2017). ((Intervento presentato al convegno RESCUE 2017 - Workshop on Reliability, Security and Quality tenutosi a Limassol, Cyprus nel May 25-26, 2017. | 1-gen-2017 | MARCELLI, ANDREARESTIFO, MARCOSANCHEZ SANCHEZ, EDGAR ERNESTOSQUILLERO, GIOVANNI | RESCUE2017_paper_12.pdf |
A DMA and CACHE-based stress schema for burn-in of automotive microcontroller / Bernardi, Paolo; Cantoro, Riccardo; Gianotto, L.; Restifo, Marco; SANCHEZ SANCHEZ, EDGAR ERNESTO; Venini, Federico; Appello, D.. - STAMPA. - (2017), pp. 1-6. ((Intervento presentato al convegno 2017 18th IEEE Latin American Test Symposium (LATS) tenutosi a Bogota (CO) nel 13-15 March 2017 [10.1109/LATW.2017.7906767]. | 1-gen-2017 | BERNARDI, PAOLOCANTORO, RICCARDORESTIFO, MARCOSANCHEZ SANCHEZ, EDGAR ERNESTOVENINI, FEDERICO + | PUBLISHED_07906767.pdf |
Effective Screening of Automotive SoCs by Combining Burn-In and System Level Test / Almeida, F.; Bernardi, P.; Calabrese, D.; Restifo, M.; Reorda, M. S.; Appello, D.; Pollaccia, G.; Tancorre, V.; Ugioli, R.; Zoppi, G.. - STAMPA. - (2019). ((Intervento presentato al convegno 22nd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2019 tenutosi a rou nel 2019 [10.1109/DDECS.2019.8724644]. | 1-gen-2019 | COSTA DE ALMEIDA, ANTONIO FELIPEBernardi P.Restifo M.Reorda M. S. + | - |
An Evolutionary Approach to Hardware Encryption and Trojan-Horse Mitigation / Marcelli, Andrea; Restifo, Marco; Sanchez, Ernesto; Squillero, Giovanni. - ELETTRONICO. - (2017). ((Intervento presentato al convegno Design, Automation and Test in Europe, DATE 2017 tenutosi a Laussane, Switzerland nel 27-31 March 2017 [10.23919/DATE.2017.7927244]. | 1-gen-2017 | MARCELLI, ANDREARESTIFO, MARCOSanchez, ErnestoSQUILLERO, GIOVANNI | hwd_security.pdf |
A hybrid in-field self-test technique for SoCs / Carbonara, S.; Bernardi, P.; Restifo, M.. - (2019), pp. 1-6. ((Intervento presentato al convegno 14th IEEE International Conference on Design and Technology of Integrated Systems In Nanoscale Era, DTIS 2019 tenutosi a grc nel 2019 [10.1109/DTIS.2019.8735075]. | 1-gen-2019 | Carbonara S.Bernardi P.Restifo M. | 08735075.pdf |
On the in-field test of embedded memories / Bernardi, Paolo; Restifo, Marco; SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo. - (2017). ((Intervento presentato al convegno 23rd IEEE International Symposium on On-Line Testing and Robust System Design. | 1-gen-2017 | BERNARDI, PAOLORESTIFO, MARCOSANCHEZ SANCHEZ, EDGAR ERNESTOSONZA REORDA, MATTEO | - |
On-Line Software-based Self-Test for ECC of Embedded RAM Memories / Restifo, Marco; Bernardi, Paolo; DE LUCA, Sergio; Sansonetti, Alessandro. - ELETTRONICO. - (2017), pp. 1-6. ((Intervento presentato al convegno Symposium on Defect and Fault TOlerance in VLSI and Nanotechnology Systems tenutosi a Cambridge (UK) nel 2017. | 1-gen-2017 | RESTIFO, MARCOBERNARDI, PAOLO + | PID4936353.pdf |
Scan chain encryption for the test, diagnosis and debug of secure circuits / Da Silva, Mathieu; Flottes, Marie Lise; DI NATALE, Giorgio; Rouzeyre, Bruno; Prinetto, Paolo Ernesto; Restifo, Marco. - ELETTRONICO. - (2017), pp. 1-6. ((Intervento presentato al convegno 22nd IEEE European Test Symposium, ETS 2017 tenutosi a cyp nel 2017 [10.1109/ETS.2017.7968248]. | 1-gen-2017 | DI NATALE, GIORGIOPRINETTO, Paolo ErnestoRESTIFO, MARCO + | 07968248.pdf |