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Towards an automatic approach for hardware verification according to ISO 26262 functional safety standard
2018 Sini, Jacopo; Sonza Reorda, Matteo; Violante, Massimo; Sarson, Peter
Towards Making Fault Injection on Abstract Models a More Accurate Tool for Predicting RT-Level Effects
2017 Flenker, Tino; Malburg, Jan; Fey, Goerschwin; Avramenko, Serhiy; Violante, Massimo; SONZA REORDA, Matteo
Transformation-based peak power reduction for test sequences
1999 Corno, Fulvio; Rebaudengo, Maurizio; SONZA REORDA, Matteo; Violante, Massimo
Uncovering hidden vulnerabilities in CNNs through evolutionary-based Image Test Libraries
2023 Turco, V.; Ruospo, A.; Gavarini, G.; Sanchez, E.; Sonza Reorda, M.
Understanding the Effects of Permanent Faults in GPU's Parallelism Management and Control Units
2023 Guerrero-Balaguera, Juan-David; Rodriguez Condia, Josie E.; dos Santos, Fernando F.; Sonza, Matteo; Rech, Paolo
Untestable faults identification in GPGPUs for safety-critical applications
2019 Condia, Josie E. Rodriguez; Da Silva, Felipe A.; Hamdioui, S.; Sauer, C.; Reorda, M. Sonza
Using Formal Methods to Support the Development of STLs for GPUs
2022 Deligiannis, Nikolaos; Faller, Tobias; RODRIGUEZ CONDIA, JOSIE ESTEBAN; Cantoro, Riccardo; Becker, Bernd; SONZA REORDA, Matteo
Using Hardware Performance Counters to support in-field GPU Testing
2021 Juan-David, Guerrero-Balaguera; Rodriguez Condia, Josie E.; SONZA REORDA, Matteo
Using Infrastructure IPs to support SW-based Self-Test of Processor Cores
2004 Bernardi, Paolo; Rebaudengo, Maurizio; SONZA REORDA, Matteo
Using parallel genetic algorithms for solving the Min-Cut problem
1996 G., Godza; Rebaudengo, Maurizio; SONZA REORDA, Matteo
Citazione | Data di pubblicazione | Autori | File |
---|---|---|---|
Towards an automatic approach for hardware verification according to ISO 26262 functional safety standard / Sini, Jacopo; Sonza Reorda, Matteo; Violante, Massimo; Sarson, Peter. - ELETTRONICO. - (2018). (Intervento presentato al convegno 24th IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS) tenutosi a Platja d’Aro, Costa Brava (ESP) nel July 2-4, 2018) [10.1109/IOLTS.2018.8474083]. | 1-gen-2018 | Sini, JacopoSonza Reorda, MatteoViolante, Massimo + | camera_ready.pdf; Towards_an_automatic_approach_for_hardware_verification_according_to_ISO_26262_functional_safety_standard.pdf |
Towards Making Fault Injection on Abstract Models a More Accurate Tool for Predicting RT-Level Effects / Flenker, Tino; Malburg, Jan; Fey, Goerschwin; Avramenko, Serhiy; Violante, Massimo; SONZA REORDA, Matteo. - 2017-:(2017), pp. 533-538. (Intervento presentato al convegno 2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017 tenutosi a deu nel 2017) [10.1109/ISVLSI.2017.99]. | 1-gen-2017 | AVRAMENKO, SERHIYVIOLANTE, MASSIMOSONZA REORDA, MATTEO + | - |
Transformation-based peak power reduction for test sequences / Corno, Fulvio; Rebaudengo, Maurizio; SONZA REORDA, Matteo; Violante, Massimo. - (1999), pp. 78-83. (Intervento presentato al convegno Low-Power Design, 1999. Proceedings. IEEE Alessandro Volta Memorial Workshop on tenutosi a Como, I nel 4-5 Mar 1999) [10.1109/LPD.1999.750406]. | 1-gen-1999 | CORNO, FulvioREBAUDENGO, MaurizioSONZA REORDA, MatteoVIOLANTE, MASSIMO | - |
Uncovering hidden vulnerabilities in CNNs through evolutionary-based Image Test Libraries / Turco, V.; Ruospo, A.; Gavarini, G.; Sanchez, E.; Sonza Reorda, M.. - (2023). (Intervento presentato al convegno International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems tenutosi a Juan-Les-Pins (FR) nel 03-05 October 2023) [10.1109/DFT59622.2023.10313530]. | 1-gen-2023 | V. TurcoA. RuospoG. GavariniE. SanchezM. Sonza Reorda | Uncovering_hidden_vulnerabilities_in_CNNs_through_evolutionary-based_Image_Test_Libraries.pdf |
Understanding the Effects of Permanent Faults in GPU's Parallelism Management and Control Units / Guerrero-Balaguera, Juan-David; Rodriguez Condia, Josie E.; dos Santos, Fernando F.; Sonza, Matteo; Rech, Paolo. - ELETTRONICO. - (2023), pp. 1-14. (Intervento presentato al convegno SC23: International Conference for High Performance Computing, Networking, Storage and Analysis tenutosi a Denver CO (USA) nel November 12 - 17, 2023) [10.1145/3581784.3607086]. | 1-gen-2023 | Juan-David Guerrero-BalagueraJosie E. Rodriguez CondiaMatteo SonzaPaolo Rech + | sc_2023_nvbitpermfi.pdf; 3581784.3607086.pdf |
Untestable faults identification in GPGPUs for safety-critical applications / Condia, Josie E. Rodriguez; Da Silva, Felipe A.; Hamdioui, S.; Sauer, C.; Reorda, M. Sonza. - ELETTRONICO. - (2019), pp. 570-573. (Intervento presentato al convegno 2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS) tenutosi a Genova nel 27-29 Nov. 2019) [10.1109/ICECS46596.2019.8964677]. | 1-gen-2019 | Condia, Josie E. RodriguezHamdioui, S.Reorda, M. Sonza + | camera ready version.pdf; 08964677.pdf |
Using Formal Methods to Support the Development of STLs for GPUs / Deligiannis, Nikolaos; Faller, Tobias; RODRIGUEZ CONDIA, JOSIE ESTEBAN; Cantoro, Riccardo; Becker, Bernd; SONZA REORDA, Matteo. - (2022), pp. 84-89. (Intervento presentato al convegno Asian Test Symposium (ATS) tenutosi a Taiwan nel 21-24 November 2022) [10.1109/ATS56056.2022.00027]. | 1-gen-2022 | Nikolaos DeligiannisJosie Esteban RodriguezRiccardo CantoroMatteo Sonza Reorda + | _ATS2022__Using_Formal_Methods_to_Support_the_Development_of_STLs_for_GPUs.pdf; Using_Formal_Methods_to_Support_the_Development_of_STLs_for_GPUs.pdf |
Using Hardware Performance Counters to support in-field GPU Testing / Juan-David, Guerrero-Balaguera; Rodriguez Condia, Josie E.; SONZA REORDA, Matteo. - (2021), pp. 1-4. (Intervento presentato al convegno 28th IEEE International Conference on Electronics Circuits and Systems tenutosi a Dubai nel 28 november-1 december 2021) [10.1109/ICECS53924.2021.9665511]. | 1-gen-2021 | Juan-David Guerrero-BalagueraJosie E. Rodriguez CondiaMatteo Sonza Reorda | GPU_Hardware_Performance_Counters.pdf; Using_Hardware_Performance_Counters_to_support_infield_GPU_Testing.pdf |
Using Infrastructure IPs to support SW-based Self-Test of Processor Cores / Bernardi, Paolo; Rebaudengo, Maurizio; SONZA REORDA, Matteo. - (2004), pp. 22-27. (Intervento presentato al convegno MTV'04: 5th International Workshop on Microprocessor Test and Verification tenutosi a Austin (TX), USA nel 9-10 settembre 2004). | 1-gen-2004 | BERNARDI, PAOLOREBAUDENGO, MaurizioSONZA REORDA, Matteo | - |
Using parallel genetic algorithms for solving the Min-Cut problem / G., Godza; Rebaudengo, Maurizio; SONZA REORDA, Matteo. - 1067:(1996), pp. 985-986. (Intervento presentato al convegno High-Performance Computing and Networking International Conference and Exhibition HPCN EUROPE 1996 tenutosi a Brussels (BEL) nel April 15–19, 1996) [10.1007/3-540-61142-8_674]. | 1-gen-1996 | REBAUDENGO, MaurizioSONZA REORDA, Matteo + | - |
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- Graphics Processing Units (GPUs) 12
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