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Edge-device Collaborative Computing for Multi-view Classification
2024 Palena, Marco; Cerquitelli, Tania; Chiasserini, Carla Fabiana
Hardware Model Checking Algorithms and Techniques
2024 Cabodi, Gianpiero; Camurati, Paolo Enrico; Palena, Marco; Pasini, Paolo
Improving Bounded Model Checking exploiting Interpolation-based learning and strengthening
2024 Cabodi, G.; Camurati, P. E.; Palena, M.; Pasini, P.
Optimizing Binary Decision Diagrams for Interpretable Machine Learning Classification
2024 Cabodi, Gianpiero; Camurati, Paolo E.; Marques-Silva, Joao; Palena, Marco; Pasini, Paolo
Interpolation with guided refinement: revisiting incrementality in SAT-based unbounded model checking
2022 Cabodi, G.; Camurati, P. E.; Palena, M.; Pasini, P.
Optimizing Binary Decision Diagrams for Interpretable Machine Learning Classification
2021 Cabodi, Gianpiero; Camurati, Paolo; Palena, Marco; Pasini, Paolo
Logic Synthesis for Interpolant Circuit Compaction
2019 Cabodi, G.; Camurati, P. E.; Palena, M.; Pasini, P.; Vendraminetto, D.
Reducing interpolant circuit size through SAT-based weakening
2019 Cabodi, G.; Camurati, P. E.; Palena, M.; Pasini, P.; Vendraminetto, D.
Test of Reconfigurable Modules in Scan Networks
2018 Cantoro, Riccardo; Ghani Zadegan, Farrokh; Palena, Marco; Pasini, Paolo; Larsson, Erik; Sonza Reorda, Matteo
To Split or to Group: From Divide-and-Conquer to Sub-Task Sharing for Verifying Multiple Properties in Model Checking
2018 Cabodi, Gianpiero; Camurati, Paolo Enrico; Loiacono, Carmelo; Palena, Marco; Pasini, Paolo; Patti, Denis; Quer, Stefano
Exploiting Boolean Satisfiability Solvers for High Performance Bit-Level Model Checking
2017 Palena, Marco
Interpolation-based learning as a mean to speed-up Bounded Model Checking
2017 Cabodi, Gianpiero; Camurati, Paolo Enrico; Palena, Marco; Pasini, Paolo; Vendraminetto, Danilo
SAT solver management strategies in IC3: an experimental approach
2017 Palena, Marco; Pasini, Paolo; Cabodi, Gianpiero; Camurati, Paolo Enrico; Mishchenko, Alan
A 7/2-approximation algorithm for the Maximum Duo-Preservation String Mapping Problem
2016 Boria, Nicolas; Cabodi, Gianpiero; Camurati, Paolo Enrico; Palena, Marco; Pasini, Paolo; Quer, Stefano
Hardware Model Checking Competition 2014: An Analysis and Comparison of Model Checkers and Benchmarks
2016 Cabodi, Gianpiero; Loiacono, Carmelo; Palena, Marco; Pasini, Paolo; Quer, Stefano; Patti, Denis; Vendraminetto, Danilo; Biere, A.; Helianko, K.
Reducing Interpolant Circuit Size by Ad Hoc Logic Synthesis and SAT-Based Weakening
2016 Cabodi, Gianpiero; Camurati, Paolo Enrico; Palena, Marco; Pasini, Paolo; Vendraminetto, Danilo
Test Time Minimization in Reconfigurable Scan Networks
2016 Cantoro, Riccardo; Palena, Marco; Pasini, Paolo; SONZA REORDA, Matteo
Interpolation with Guided Refinement: revisiting incrementality in SAT-based Unbounded Model Checking
2014 Cabodi, Gianpiero; Palena, Marco; Pasini, Paolo
Fast Cone-Of-Influence Computation and Estimation in Problems with Multiple Properties
2013 Loiacono, Carmelo; Palena, Marco; Pasini, Paolo; Patti, Denis; Quer, Stefano; Vendraminetto, Danilo; Baumgartner, J.
Trading-off Incrementality and Dynamic Restart of Multiple Solvers in IC3
2013 Cabodi, Gianpiero; A., Mishchenko; Palena, Marco
| Citazione | Data di pubblicazione | Autori | File |
|---|---|---|---|
| Edge-device Collaborative Computing for Multi-view Classification / Palena, Marco; Cerquitelli, Tania; Chiasserini, Carla Fabiana. - In: COMPUTER NETWORKS. - ISSN 1389-1286. - STAMPA. - (2024). | 1-gen-2024 | Marco PalenaTania CerquitelliCarla Fabiana Chiasserini | DMVOC___MultiView.pdf |
| Hardware Model Checking Algorithms and Techniques / Cabodi, Gianpiero; Camurati, Paolo Enrico; Palena, Marco; Pasini, Paolo. - In: ALGORITHMS. - ISSN 1999-4893. - ELETTRONICO. - 17:6(2024). [10.3390/a17060253] | 1-gen-2024 | Cabodi, GianpieroCamurati, Paolo EnricoPalena, MarcoPasini, Paolo | algorithms-17-00253-v3.pdf |
| Improving Bounded Model Checking exploiting Interpolation-based learning and strengthening / Cabodi, G.; Camurati, P. E.; Palena, M.; Pasini, P.. - In: IEEE ACCESS. - ISSN 2169-3536. - ELETTRONICO. - 12:(2024), pp. 119341-119349. [10.1109/access.2024.3446802] | 1-gen-2024 | Cabodi, G.Camurati, P. E.Palena, M.Pasini, P. | Improving_Bounded_Model_Checking_Exploiting_Interpolation-Based_Learning_and_Strengthening.pdf |
| Optimizing Binary Decision Diagrams for Interpretable Machine Learning Classification / Cabodi, Gianpiero; Camurati, Paolo E.; Marques-Silva, Joao; Palena, Marco; Pasini, Paolo. - In: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS. - ISSN 0278-0070. - ELETTRONICO. - 43:10(2024), pp. 3083-3087. [10.1109/tcad.2024.3387876] | 1-gen-2024 | Cabodi, GianpieroCamurati, Paolo E.Palena, MarcoPasini, Paolo + | Optimizing_Binary_Decision_Diagrams_for_Interpretable_Machine_Learning_Classification.pdf; Pasini-Optimizing.pdf |
| Interpolation with guided refinement: revisiting incrementality in SAT-based unbounded model checking / Cabodi, G.; Camurati, P. E.; Palena, M.; Pasini, P.. - In: FORMAL METHODS IN SYSTEM DESIGN. - ISSN 0925-9856. - (2022), pp. 1-30. [10.1007/s10703-022-00406-7] | 1-gen-2022 | Cabodi, G.Camurati, P. E.Palena, M.Pasini, P. | s10703-022-00406-7.pdf; 10703_2022_406_postprint.pdf |
| Optimizing Binary Decision Diagrams for Interpretable Machine Learning Classification / Cabodi, Gianpiero; Camurati, Paolo; Palena, Marco; Pasini, Paolo. - STAMPA. - (2021), pp. 1122-1125. (Intervento presentato al convegno Design Automation and Test in Europe (DATE) nel 01-05 February 2021) [10.23919/DATE51398.2021.9474083]. | 1-gen-2021 | Cabodi,GianpieroCamurati,PaoloPalena,MarcoPasini,Paolo | Optimizing_Binary_Decision_Diagrams_for_Interpretable_Machine_Learning_Classification.pdf; Optimizing_Binary_Decision_Diagrams_for_Interpretable_Machine_Learning_Classification.pdf |
| Logic Synthesis for Interpolant Circuit Compaction / Cabodi, G.; Camurati, P. E.; Palena, M.; Pasini, P.; Vendraminetto, D.. - In: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS. - ISSN 0278-0070. - STAMPA. - 38:2(2019), pp. 380-384. [10.1109/TCAD.2018.2808229] | 1-gen-2019 | Cabodi, G.Camurati, P. E.Palena, M.Pasini, P.Vendraminetto, D. | 08299440.pdf |
| Reducing interpolant circuit size through SAT-based weakening / Cabodi, G.; Camurati, P. E.; Palena, M.; Pasini, P.; Vendraminetto, D.. - In: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS. - ISSN 0278-0070. - ELETTRONICO. - (2019). [10.1109/TCAD.2019.2915317] | 1-gen-2019 | Cabodi, G.Camurati, P. E.Palena, M.Pasini, P.Vendraminetto, D. | - |
| Test of Reconfigurable Modules in Scan Networks / Cantoro, Riccardo; Ghani Zadegan, Farrokh; Palena, Marco; Pasini, Paolo; Larsson, Erik; Sonza Reorda, Matteo. - In: IEEE TRANSACTIONS ON COMPUTERS. - ISSN 0018-9340. - STAMPA. - (2018), pp. 1-1. [10.1109/TC.2018.2834915] | 1-gen-2018 | Cantoro, RiccardoPalena, MarcoPasini, PaoloSonza Reorda, Matteo + | 08357895.pdf; 08357895.pdf |
| To Split or to Group: From Divide-and-Conquer to Sub-Task Sharing for Verifying Multiple Properties in Model Checking / Cabodi, Gianpiero; Camurati, Paolo Enrico; Loiacono, Carmelo; Palena, Marco; Pasini, Paolo; Patti, Denis; Quer, Stefano. - In: INTERNATIONAL JOURNAL ON SOFTWARE TOOLS FOR TECHNOLOGY TRANSFER. - ISSN 1433-2779. - 20:(2018), pp. 313-325. [10.1007/s10009-017-0451-8] | 1-gen-2018 | CABODI, GianpieroCAMURATI, Paolo EnricoLOIACONO, CARMELOPALENA, MARCOPASINI, PAOLOPATTI, DENISQUER, Stefano | Cabodi2018_Article_ToSplitOrToGroupFromDivide-and.pdf |
| Exploiting Boolean Satisfiability Solvers for High Performance Bit-Level Model Checking / Palena, Marco. - (2017). | 1-gen-2017 | PALENA, MARCO | - |
| Interpolation-based learning as a mean to speed-up Bounded Model Checking / Cabodi, Gianpiero; Camurati, Paolo Enrico; Palena, Marco; Pasini, Paolo; Vendraminetto, Danilo. - ELETTRONICO. - (2017). (Intervento presentato al convegno 15th International Conference on Software Engineering and Formal Methods tenutosi a Trento (Italy) nel September 4-8, 2017). | 1-gen-2017 | CABODI, GianpieroCAMURATI, Paolo EnricoPALENA, MARCOPASINI, PAOLOVENDRAMINETTO, DANILO | - |
| SAT solver management strategies in IC3: an experimental approach / Palena, Marco; Pasini, Paolo; Cabodi, Gianpiero; Camurati, Paolo Enrico; Mishchenko, Alan. - In: FORMAL METHODS IN SYSTEM DESIGN. - ISSN 0925-9856. - STAMPA. - 50:1(2017), pp. 39-74. [10.1007/s10703-017-0272-0] | 1-gen-2017 | PALENA, MARCOPASINI, PAOLOCABODI, GianpieroCAMURATI, Paolo Enrico + | Cabodi2017_Article_SATSolverManagementStrategiesI.pdf |
| A 7/2-approximation algorithm for the Maximum Duo-Preservation String Mapping Problem / Boria, Nicolas; Cabodi, Gianpiero; Camurati, Paolo Enrico; Palena, Marco; Pasini, Paolo; Quer, Stefano. - ELETTRONICO. - (2016). (Intervento presentato al convegno 27th Annual Symposium on Combinatorial Pattern Matching tenutosi a Tel Aviv, Israel nel June 27 - 29, 2016). | 1-gen-2016 | BORIA, NICOLASCABODI, GianpieroCAMURATI, Paolo EnricoPALENA, MARCOPASINI, PAOLOQUER, Stefano | - |
| Hardware Model Checking Competition 2014: An Analysis and Comparison of Model Checkers and Benchmarks / Cabodi, Gianpiero; Loiacono, Carmelo; Palena, Marco; Pasini, Paolo; Quer, Stefano; Patti, Denis; Vendraminetto, Danilo; Biere, A.; Helianko, K.. - In: JOURNAL ON SATISFIABILITY, BOOLEAN MODELING AND COMPUTATION. - ISSN 1574-0617. - ELETTRONICO. - 9:(2016), pp. 135-172. | 1-gen-2016 | CABODI, GianpieroLOIACONO, CARMELOPALENA, MARCOPASINI, PAOLOQUER, StefanoPATTI, DENISVENDRAMINETTO, DANILO + | - |
| Reducing Interpolant Circuit Size by Ad Hoc Logic Synthesis and SAT-Based Weakening / Cabodi, Gianpiero; Camurati, Paolo Enrico; Palena, Marco; Pasini, Paolo; Vendraminetto, Danilo. - ELETTRONICO. - (2016), pp. 25-32. (Intervento presentato al convegno Formal Methods in Computer-Aided Design tenutosi a Mountain View, California, USA nel October 3 - 6, 2016) [10.1109/FMCAD.2016.7886657]. | 1-gen-2016 | CABODI, GianpieroCAMURATI, Paolo EnricoPALENA, MARCOPASINI, PAOLOVENDRAMINETTO, DANILO | fmcad2016A4.pdf; 07886657.pdf |
| Test Time Minimization in Reconfigurable Scan Networks / Cantoro, Riccardo; Palena, Marco; Pasini, Paolo; SONZA REORDA, Matteo. - STAMPA. - (2016). (Intervento presentato al convegno 2016 IEEE 25th Asian Test Symposium (ATS) tenutosi a Hiroshima (JP) nel November 21-24, 2016) [10.1109/ATS.2016.58]. | 1-gen-2016 | CANTORO, RICCARDOPALENA, MARCOPASINI, PAOLOSONZA REORDA, Matteo | PID4437261_pdfexpress.pdf; PUBLISHED_07796093.pdf |
| Interpolation with Guided Refinement: revisiting incrementality in SAT-based Unbounded Model Checking / Cabodi, Gianpiero; Palena, Marco; Pasini, Paolo. - ELETTRONICO. - Formal Methods in Computer-Aided Design (FMCAD), 2014:(2014), pp. 43-50. (Intervento presentato al convegno Formal Methods in Computer-Aided Design (FMCAD 2014) tenutosi a Lausanne, Switzerland nel 21-24 Oct. 2014) [10.1109/FMCAD.2014.6987594]. | 1-gen-2014 | CABODI, GianpieroPALENA, MARCOPASINI, PAOLO | - |
| Fast Cone-Of-Influence Computation and Estimation in Problems with Multiple Properties / Loiacono, Carmelo; Palena, Marco; Pasini, Paolo; Patti, Denis; Quer, Stefano; Vendraminetto, Danilo; Baumgartner, J.. - STAMPA. - (2013), pp. 803-806. (Intervento presentato al convegno Published in: Design, Automation & Test in Europe Conference & Exhibition (DATE) tenutosi a Grenoble, France nel March 2013) [10.7873/DATE.2013.170]. | 1-gen-2013 | LOIACONO, CARMELOPALENA, MARCOPASINI, PAOLOPATTI, DENISQUER, StefanoVENDRAMINETTO, DANILO + | - |
| Trading-off Incrementality and Dynamic Restart of Multiple Solvers in IC3 / Cabodi, Gianpiero; A., Mishchenko; Palena, Marco. - ELETTRONICO. - (2013). (Intervento presentato al convegno International Workshop on Design and Implementation of Formal Tools and Systems tenutosi a Portland, OR nel 19 Ottobre 2013). | 1-gen-2013 | CABODI, GianpieroPALENA, MARCO + | - |