Reliability assessment is mandatory to guarantee the correct behavior of Deep Neural Network (DNN) hardware accelerators in safety-critical applications. While fault injection stands out as a well-established, practical and robust method for reliability assessment, it is still a very time-consuming process. This paper contributes with three recipes for optimizing the efficiency of the reliability assessment: a) hybrid analytical and hierarchical FI-based reliability assessment for systolic-array-based DNN accelerators; b) mixing techniques for the reliability assessment of in-chip AI accelerators in GPUs; c) reliability assessment of DNN hardware accelerators through physical fault injection. The experimental results demonstrate the efficiency of the proposed methods applied to their target DNN HW accelerator platforms.

Special Session: Reliability Assessment Recipes for DNN Accelerators / Ahmadilivani, Mohammad Hasan; Bosio, Alberto; Deveautour, Bastien; Santos, Fernando Fernandes Dos; Guerrero-Balaguera, Juan-David; Jenihhin, Maksim; Kritikakou, Angeliki; Limas Sierra, Robert; Pappalardo, Salvatore; Raik, Jaan; Rodriguez Condia, Josie E.; Sonza Reorda, Matteo; Taheri, Mahdi; Traiola, Marcello. - ELETTRONICO. - (2024). (Intervento presentato al convegno 2024 IEEE 42nd VLSI Test Symposium (VTS) tenutosi a Tempe (USA) nel 22-24 April 2024) [10.1109/vts60656.2024.10538707].

Special Session: Reliability Assessment Recipes for DNN Accelerators

Bosio, Alberto;Guerrero-Balaguera, Juan-David;Limas Sierra, Robert;Rodriguez Condia, Josie E.;Sonza Reorda, Matteo;
2024

Abstract

Reliability assessment is mandatory to guarantee the correct behavior of Deep Neural Network (DNN) hardware accelerators in safety-critical applications. While fault injection stands out as a well-established, practical and robust method for reliability assessment, it is still a very time-consuming process. This paper contributes with three recipes for optimizing the efficiency of the reliability assessment: a) hybrid analytical and hierarchical FI-based reliability assessment for systolic-array-based DNN accelerators; b) mixing techniques for the reliability assessment of in-chip AI accelerators in GPUs; c) reliability assessment of DNN hardware accelerators through physical fault injection. The experimental results demonstrate the efficiency of the proposed methods applied to their target DNN HW accelerator platforms.
2024
979-8-3503-6378-4
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/2989153