statistiche ricercatore

Continente	#
NA - Nord America	2.351
EU - Europa	2.232
AS - Asia	397
SA - Sud America	13
AF - Africa	9
Continente sconosciuto - Info sul continente non disponibili	1
Totale	5.003

Nazione	#
US - Stati Uniti d'America	2.323
IT - Italia	598
GB - Regno Unito	432
FR - Francia	345
DE - Germania	337
CN - Cina	157
RU - Federazione Russa	142
UA - Ucraina	104
TR - Turchia	73
NL - Olanda	71
SG - Singapore	55
AT - Austria	39
KR - Corea	34
IE - Irlanda	29
SE - Svezia	29
CA - Canada	28
IN - India	26
CH - Svizzera	23
FI - Finlandia	20
IL - Israele	20
ES - Italia	11
EU - Europa	10
GR - Grecia	7
HK - Hong Kong	7
BR - Brasile	6
RO - Romania	6
BE - Belgio	5
ID - Indonesia	5
JP - Giappone	5
AP - ???statistics.table.value.countryCode.AP???	4
IR - Iran	4
MY - Malesia	4
SN - Senegal	4
BD - Bangladesh	3
CL - Cile	3
EE - Estonia	3
JO - Giordania	3
AM - Armenia	2
BY - Bielorussia	2
CO - Colombia	2
CZ - Repubblica Ceca	2
HR - Croazia	2
PK - Pakistan	2
PT - Portogallo	2
TW - Taiwan	2
UY - Uruguay	2
ZA - Sudafrica	2
AE - Emirati Arabi Uniti	1
DK - Danimarca	1
EG - Egitto	1
GH - Ghana	1
KE - Kenya	1
LK - Sri Lanka	1
LV - Lettonia	1
MD - Moldavia	1
Totale	5.003

Nome	#
An Evolutionary Methodology for Test Generation for Peripheral Cores Via Dynamic FSM Extraction	538
Functional Verification of DMA Controllers	455
An Effective Approach for the Diagnosis of Transition-Delay Faults in SoCs, based on SBST and Scan Chains	365
A local analysis of an incremental evolutionary tool for processor diagnosis	309
A Hybrid Approach to the Test of Cache Memory Controllers Embedded in SoCs	304
Design validation of multithreaded architectures using concurrent threads evolution	301
A Software-based self-test methodology for system peripherals	301
Software-Based Self-Test Strategy for Data Cache Memories Embedded in SoCs	300
On Automatic Test Block Generation for Peripheral Testing in SoCs via Dynamic FSMs Extraction	299
Automotive Microcontroller End-of-Line Test via Software-Based Methodologies	287
Generating Power-Hungry Test Programs for Power-Aware Validation of Pipelined Processors	285
On the Generation of Functional Test Programs for the Cache Replacement Logic	276
Design Validation of Multithreaded Processors using Threads Evolution	268
Automatic Detection of Software Defects: an Industrial Experience	266
On the generation of test programs for chip multithread computer architectures	245
Test Program Generation for Communication Peripherals in Processor-Based Systems-on-Chip	214
Totale	5.013

	Totale	Lug	Ago	Sett	Ott	Nov	Dic	Gen	Feb	Mar	Apr	Mag	Giu
2019/2020	223	0	0	0	0	0	0	39	60	58	34	25	7
2020/2021	325	35	77	12	49	28	27	7	28	11	22	18	11
2021/2022	167	9	15	1	5	9	13	11	12	4	18	31	39
2022/2023	353	21	58	13	32	34	54	62	12	26	3	15	23
2023/2024	58	4	9	1	5	5	1	1	2	1	2	5	22
2024/2025	248	14	64	15	84	18	53	0	0	0	0	0	0
Totale													5.013

PORTO @ Archivio Istituzionale della Ricerca