VEIRAS BOLZANI, Leticia Maria
VEIRAS BOLZANI, Leticia Maria
Dipartimento di Automatica Informatica (attivo dal 01/01/1900 al 31/12/2011)
L. BOLZANI; BOLZANI L
016168
A Hybrid Approach to Fault Detection and Correction in SoCs
2007 Bernardi, Paolo; VEIRAS BOLZANI, Leticia Maria; SONZA REORDA, Matteo
A Software-based Methodology for the Generation of Peripheral Test Sets Based on High-level Descriptions
2007 VEIRAS BOLZANI, Leticia Maria; SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo
An Automated Methodology for Cogeneration of Test Blocks for Peripheral Cores
2007 VEIRAS BOLZANI, Leticia Maria; SANCHEZ SANCHEZ, EDGAR ERNESTO; Schillaci, Massimiliano; SONZA REORDA, Matteo; Squillero, Giovanni
An optimized hybrid approach to provide fault detection and correction in SoCs
2007 VEIRAS BOLZANI, Leticia Maria; Bernardi, Paolo; SONZA REORDA, Matteo
Co-evolution of Test Programs and Stimuli Vectors for Testing of Embedded Peripheral Cores
2007 VEIRAS BOLZANI, Leticia Maria; SANCHEZ SANCHEZ, EDGAR ERNESTO; Schillaci, Massimiliano; Squillero, Giovanni
Coupling EA and High-Level Metrics for the Automatic Generation of Test Blocks for Peripheral Cores
2007 VEIRAS BOLZANI, Leticia Maria; SANCHEZ SANCHEZ, EDGAR ERNESTO; Schillaci, Massimiliano; Squillero, Giovanni
Extended Fault Detection Techniques for Systems-on-Chip
2007 Bernardi, Paolo; VEIRAS BOLZANI, Leticia Maria; SONZA REORDA, Matteo
On Test Program Generation for Peripheral Components in a SoC Resorting to High-Level Metrics
2007 VEIRAS BOLZANI, Leticia Maria; Sanchez, E.; SONZA REORDA, Matteo
Software-Based On-Line Test of Communication Peripherals in Processor-Based Systems for Automotive Applications
2006 Bernardi, Paolo; VEIRAS BOLZANI, Leticia Maria; Violante, Massimo; SONZA REORDA, Matteo; A., Manzone; M., Ossela
An integrated approach for increasing the soft-error detection capabilities in SoCs processors
2005 Bernardi, Paolo; VEIRAS BOLZANI, Leticia Maria; Rebaudengo, Maurizio; SONZA REORDA, Matteo; Violante, Massimo
On-line Detection of Control-Flow Errors in SoCs by means of an Infrastructure IP core
2005 Bernardi, Paolo; VEIRAS BOLZANI, Leticia Maria; Rebaudengo, Maurizio; SONZA REORDA, Matteo; F., Vargas; Violante, Massimo
Pandora I-IP: an HW/SW approach to Control Flow Checking
2005 Bernardi, Paolo; VEIRAS BOLZANI, Leticia Maria; Rebaudengo, Maurizio; SONZA REORDA, Matteo; F. L., Vargas; Violante, Massimo
An Infrastructure IP for Soft Error Detection
2004 VEIRAS BOLZANI, Leticia Maria; Rebaudengo, Maurizio; SONZA REORDA, Matteo; F., Vargas; Violante, Massimo
Cerberus I-IP: an HW/SW approach to Control Flow Checking
2004 Bernardi, Paolo; VEIRAS BOLZANI, Leticia Maria; Rebaudengo, Maurizio; SONZA REORDA, Matteo; F. L., Vargas; Violante, Massimo
Hybrid Soft Error Detection by means of Infrastructure IP cores
2004 VEIRAS BOLZANI, Leticia Maria; Rebaudengo, Maurizio; SONZA REORDA, Matteo; F. L., Vargas; Violante, Massimo
On the Mitigation of Conducted Electromagnetic Immunity by Means of SW-Based Fault Handling Mechanisms
2003 F. L., Vargas; D., Brum; D. P., Prestes; VEIRAS BOLZANI, Leticia Maria
On the Study of the Effectiveness of SW-Based Fault Handling Mechanisms to Cope with IC Conducted Electromagnetic Interference
2003 F. L., Vargas; D., Brum; D. P., Prestes; D. V., Lettnin; VEIRAS BOLZANI, Leticia Maria
SW-Based Fault Handling Mechanisms to Cope with EMI in Embedded Electronics: are they a good remedy? A Case Study on a COTS Microprocessor
2003 F. L., Vargas; D., Brum; D. P., Prestes; VEIRAS BOLZANI, Leticia Maria; E. L., Rhod
Citazione | Data di pubblicazione | Autori | File |
---|---|---|---|
A Hybrid Approach to Fault Detection and Correction in SoCs / Bernardi, Paolo; VEIRAS BOLZANI, Leticia Maria; SONZA REORDA, Matteo. - (2007), pp. 107-112. (Intervento presentato al convegno IOLTS2007: IEEE International On-Line Testing Symposium tenutosi a Hersonissos, Greece nel July 2007). | 1-gen-2007 | BERNARDI, PAOLOVEIRAS BOLZANI, Leticia MariaSONZA REORDA, Matteo | - |
A Software-based Methodology for the Generation of Peripheral Test Sets Based on High-level Descriptions / VEIRAS BOLZANI, Leticia Maria; SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo. - (2007), pp. 348-353. (Intervento presentato al convegno SBCCI2007: ACM 20th SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN). | 1-gen-2007 | VEIRAS BOLZANI, Leticia MariaSANCHEZ SANCHEZ, EDGAR ERNESTOSONZA REORDA, Matteo | - |
An Automated Methodology for Cogeneration of Test Blocks for Peripheral Cores / VEIRAS BOLZANI, Leticia Maria; SANCHEZ SANCHEZ, EDGAR ERNESTO; Schillaci, Massimiliano; SONZA REORDA, Matteo; Squillero, Giovanni. - (2007), pp. 265-270. (Intervento presentato al convegno IOLTS2007: IEEE International On-Line Testing Symposium tenutosi a Hersonissos-Heraklion, Crete, Greece nel 8-11 July 2007) [10.1109/IOLTS.2007.14]. | 1-gen-2007 | VEIRAS BOLZANI, Leticia MariaSANCHEZ SANCHEZ, EDGAR ERNESTOSCHILLACI, MASSIMILIANOSONZA REORDA, MatteoSQUILLERO, Giovanni | - |
An optimized hybrid approach to provide fault detection and correction in SoCs / VEIRAS BOLZANI, Leticia Maria; Bernardi, Paolo; SONZA REORDA, Matteo. - (2007), pp. 342-347. (Intervento presentato al convegno SBCCI2007: IEEE 20th SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN tenutosi a Rio de Janeiro nel September 2007). | 1-gen-2007 | VEIRAS BOLZANI, Leticia MariaBERNARDI, PAOLOSONZA REORDA, Matteo | - |
Co-evolution of Test Programs and Stimuli Vectors for Testing of Embedded Peripheral Cores / VEIRAS BOLZANI, Leticia Maria; SANCHEZ SANCHEZ, EDGAR ERNESTO; Schillaci, Massimiliano; Squillero, Giovanni. - (2007), pp. 3474-3481. (Intervento presentato al convegno CEC 2007, IEEE Congress on Evolutionary Computation). | 1-gen-2007 | VEIRAS BOLZANI, Leticia MariaSANCHEZ SANCHEZ, EDGAR ERNESTOSCHILLACI, MASSIMILIANOSQUILLERO, Giovanni | - |
Coupling EA and High-Level Metrics for the Automatic Generation of Test Blocks for Peripheral Cores / VEIRAS BOLZANI, Leticia Maria; SANCHEZ SANCHEZ, EDGAR ERNESTO; Schillaci, Massimiliano; Squillero, Giovanni. - (2007), pp. 1912-1919. (Intervento presentato al convegno GECCO tenutosi a London nel July 2007) [10.1145/1276958.1277342]. | 1-gen-2007 | VEIRAS BOLZANI, Leticia MariaSANCHEZ SANCHEZ, EDGAR ERNESTOSCHILLACI, MASSIMILIANOSQUILLERO, Giovanni | - |
Extended Fault Detection Techniques for Systems-on-Chip / Bernardi, Paolo; VEIRAS BOLZANI, Leticia Maria; SONZA REORDA, Matteo. - (2007), pp. 55-60. (Intervento presentato al convegno DDECS2007: IEEE Design & Diagnostic of Electronic Circuits & Systems tenutosi a Krakow, Poland nel April 2007). | 1-gen-2007 | BERNARDI, PAOLOVEIRAS BOLZANI, Leticia MariaSONZA REORDA, Matteo | - |
On Test Program Generation for Peripheral Components in a SoC Resorting to High-Level Metrics / VEIRAS BOLZANI, Leticia Maria; Sanchez, E.; SONZA REORDA, Matteo. - (2007). (Intervento presentato al convegno 8th IEEE Latin American Test Workshop - LATW'07 tenutosi a Lima, Peru nel March 11-14). | 1-gen-2007 | VEIRAS BOLZANI, Leticia MariaE. SANCHEZSONZA REORDA, Matteo | - |
Software-Based On-Line Test of Communication Peripherals in Processor-Based Systems for Automotive Applications / Bernardi, Paolo; VEIRAS BOLZANI, Leticia Maria; Violante, Massimo; SONZA REORDA, Matteo; A., Manzone; M., Ossela. - (2006). [10.1109/MTV.2006.19] | 1-gen-2006 | BERNARDI, PAOLOVEIRAS BOLZANI, Leticia MariaVIOLANTE, MASSIMOSONZA REORDA, Matteo + | - |
An integrated approach for increasing the soft-error detection capabilities in SoCs processors / Bernardi, Paolo; VEIRAS BOLZANI, Leticia Maria; Rebaudengo, Maurizio; SONZA REORDA, Matteo; Violante, Massimo. - (2005), pp. 307-312. (Intervento presentato al convegno IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems) [10.1109/DFTVS.2005.17]. | 1-gen-2005 | BERNARDI, PAOLOVEIRAS BOLZANI, Leticia MariaREBAUDENGO, MaurizioSONZA REORDA, MatteoVIOLANTE, MASSIMO | - |
On-line Detection of Control-Flow Errors in SoCs by means of an Infrastructure IP core / Bernardi, Paolo; VEIRAS BOLZANI, Leticia Maria; Rebaudengo, Maurizio; SONZA REORDA, Matteo; F., Vargas; Violante, Massimo. - (2005), pp. 50-58. (Intervento presentato al convegno IEEE Dependable Systems and Networks Symposium) [10.1109/DSN.2005.74]. | 1-gen-2005 | BERNARDI, PAOLOVEIRAS BOLZANI, Leticia MariaREBAUDENGO, MaurizioSONZA REORDA, MatteoVIOLANTE, MASSIMO + | - |
Pandora I-IP: an HW/SW approach to Control Flow Checking / Bernardi, Paolo; VEIRAS BOLZANI, Leticia Maria; Rebaudengo, Maurizio; SONZA REORDA, Matteo; F. L., Vargas; Violante, Massimo. - (2005). (Intervento presentato al convegno 6th IEEE Latin American Test Workshop - LATW'05 tenutosi a Bahia Brazil nel March 30 - April 2). | 1-gen-2005 | BERNARDI, PAOLOVEIRAS BOLZANI, Leticia MariaREBAUDENGO, MaurizioSONZA REORDA, MatteoVIOLANTE, MASSIMO + | - |
An Infrastructure IP for Soft Error Detection / VEIRAS BOLZANI, Leticia Maria; Rebaudengo, Maurizio; SONZA REORDA, Matteo; F., Vargas; Violante, Massimo. - (2004). (Intervento presentato al convegno LATW'04: IEEE Latin-American Test WorkShop tenutosi a Cartagena, Colombia nel 8-10 marzo 2004). | 1-gen-2004 | VEIRAS BOLZANI, Leticia MariaREBAUDENGO, MaurizioSONZA REORDA, MatteoVIOLANTE, MASSIMO + | - |
Cerberus I-IP: an HW/SW approach to Control Flow Checking / Bernardi, Paolo; VEIRAS BOLZANI, Leticia Maria; Rebaudengo, Maurizio; SONZA REORDA, Matteo; F. L., Vargas; Violante, Massimo. - (2004). (Intervento presentato al convegno 2nd IEEE International Workshop on Infrastructure IP - I-IP'04 tenutosi a Lisbon, Portugal nel December 5-8). | 1-gen-2004 | BERNARDI, PAOLOVEIRAS BOLZANI, Leticia MariaREBAUDENGO, MaurizioSONZA REORDA, MatteoVIOLANTE, MASSIMO + | - |
Hybrid Soft Error Detection by means of Infrastructure IP cores / VEIRAS BOLZANI, Leticia Maria; Rebaudengo, Maurizio; SONZA REORDA, Matteo; F. L., Vargas; Violante, Massimo. - (2004). (Intervento presentato al convegno 10th IEEE International On-Line Test Symposium - IOLTS'04 tenutosi a Madeira Island, Portugal nel Jully 12-14). | 1-gen-2004 | VEIRAS BOLZANI, Leticia MariaREBAUDENGO, MaurizioSONZA REORDA, MatteoVIOLANTE, MASSIMO + | - |
On the Mitigation of Conducted Electromagnetic Immunity by Means of SW-Based Fault Handling Mechanisms / F. L., Vargas; D., Brum; D. P., Prestes; VEIRAS BOLZANI, Leticia Maria. - (2003). (Intervento presentato al convegno 4th IEEE Latin American Test Workshop - LATW'03 tenutosi a Natal, Brazil). | 1-gen-2003 | VEIRAS BOLZANI, Leticia Maria + | - |
On the Study of the Effectiveness of SW-Based Fault Handling Mechanisms to Cope with IC Conducted Electromagnetic Interference / F. L., Vargas; D., Brum; D. P., Prestes; D. V., Lettnin; VEIRAS BOLZANI, Leticia Maria. - (2003). (Intervento presentato al convegno IX Workshop IBERCHIP). | 1-gen-2003 | VEIRAS BOLZANI, Leticia Maria + | - |
SW-Based Fault Handling Mechanisms to Cope with EMI in Embedded Electronics: are they a good remedy? A Case Study on a COTS Microprocessor / F. L., Vargas; D., Brum; D. P., Prestes; VEIRAS BOLZANI, Leticia Maria; E. L., Rhod. - (2003). (Intervento presentato al convegno 9th IEEE International On-Line Test Symposium - IOLTS'03 tenutosi a Kos Island, Greece nel July 7-9). | 1-gen-2003 | VEIRAS BOLZANI, Leticia Maria + | - |