Archivio Istituzionale della RicercaSANCHEZ SANCHEZ, EDGAR ERNESTO
SANCHEZ SANCHEZ, EDGAR ERNESTO
Dipartimento di Automatica e Informatica
Sanchez, Ernesto; E. Sanchez; Sanchez E.; Ernesto Sanchez; SANCHEZ EDGAR; SANCHEZ E.; SANCHEZ SANCHEZ EDGAR ERNESTO; SANCHEZ SANCHEZ E.
012684
Exploiting co-evolution and a modified island model to climb the Core War hill
2003 Corno, Fulvio; SANCHEZ SANCHEZ, EDGAR ERNESTO; Squillero, Giovanni
Automatic Test Programs Generation Driven by Internal Performance Counters
2004 W., Lindsay; SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo; Squillero, Giovanni
Automatic Test Program Generation: a Case Study
2004 Corno, Fulvio; SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo; Squillero, Giovanni
Code Generation for Functional Validation of Pipelined Microprocessors
2004 Corno, Fulvio; SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo; Squillero, Giovanni
Automatic Verification of RT-Level Microprocessor Cores Using Behavioral Specifications: a Case Study
2004 L., Anghel; SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo; Squillero, Giovanni; R., Velazco
Exploiting HW Acceleration for Classifying Complex Test Program Generation Problems
2004 SANCHEZ SANCHEZ, EDGAR ERNESTO; Squillero, Giovanni; Violante, Massimo
Coupling different methodologies to validate obsolete microprocessors
2004 L., Anghel; SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo; Squillero, Giovanni; R., Velazco
On the evolution of corewar warriors
2004 Corno, Fulvio; SANCHEZ SANCHEZ, EDGAR ERNESTO; Squillero, Giovanni
A Local Analysis of the Genotype-Fitness Mapping in Hardware Optimization Problems
2004 SANCHEZ SANCHEZ, EDGAR ERNESTO; Squillero, Giovanni; Violante, Massimo
A modular Architecture for a Populationless Evolutionary Algorithm for MIP
2005 SANCHEZ SANCHEZ, EDGAR ERNESTO; Schillaci, Massimiliano; Squillero, Giovanni
Automatic Test Generation for Verifying Microprocessors
2005 Corno, Fulvio; SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo; Squillero, Giovanni
New Evolutionary Techniques for Test-Program Generation for Complex Microprocessor Cores
2005 SANCHEZ SANCHEZ, EDGAR ERNESTO; Schillaci, Massimiliano; SONZA REORDA, Matteo; Squillero, Giovanni; Sterpone, Luca; Violante, Massimo
Automatic Completion and Refinement of Verification Sets for Microprocessor Cores
2005 SANCHEZ SANCHEZ, EDGAR ERNESTO; Squillero, Giovanni; SONZA REORDA, Matteo
On the transformation of manufacturing test sets into on-line test sets for microprocessors
2005 SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo; Squillero, Giovanni
Automatic completion and refinement of verification sets for microprocessor cores
2005 SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo; Squillero, Giovanni
Integrating BIST techniques for on-line SoC testing
2005 Bernardi, Paolo; Grosso, Michelangelo; Manzone, A; Rebaudengo, Maurizio; SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo
Diagnosing faulty functional units in processors by using automatically generated test sets
2005 Bernardi, Paolo; SANCHEZ SANCHEZ, EDGAR ERNESTO; Schillaci, Massimiliano; SONZA REORDA, Matteo; Squillero, Giovanni
Automatic Generation of Test Sets for SBST of Microprocessor IP Cores
2005 SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo; Squillero, Giovanni; Violante, Massimo
Test Program Generation from High-level Microprocessor Descriptions
2005 SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo; Squillero, Giovanni
Evolving assembly programs: how games help microprocessor validation
2005 Corno, Fulvio; SANCHEZ SANCHEZ, EDGAR ERNESTO; Squillero, Giovanni
| Citazione | Data di pubblicazione | Autori | File |
|---|---|---|---|
| Exploiting co-evolution and a modified island model to climb the Core War hill / Corno, Fulvio; SANCHEZ SANCHEZ, EDGAR ERNESTO; Squillero, Giovanni. - (2003), pp. 2217-2221. (Intervento presentato al convegno Congress on Evolutionary Computation) [10.1109/CEC.2003.1299947]. | 1-gen-2003 | CORNO, FulvioSANCHEZ SANCHEZ, EDGAR ERNESTOSQUILLERO, Giovanni | - |
| Automatic Test Programs Generation Driven by Internal Performance Counters / W., Lindsay; SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo; Squillero, Giovanni. - (2004), pp. 8-13. (Intervento presentato al convegno International Workshop on Microprocessor Test and Verification) [10.1109/MTV.2004.5]. | 1-gen-2004 | SANCHEZ SANCHEZ, EDGAR ERNESTOSONZA REORDA, MatteoSQUILLERO, Giovanni + | - |
| Automatic Test Program Generation: a Case Study / Corno, Fulvio; SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo; Squillero, Giovanni. - In: IEEE DESIGN & TEST OF COMPUTERS. - ISSN 0740-7475. - 21:(2004), pp. 102-109. [10.1109/MDT.2004.1277902] | 1-gen-2004 | CORNO, FulvioSANCHEZ SANCHEZ, EDGAR ERNESTOSONZA REORDA, MatteoSQUILLERO, Giovanni | - |
| Code Generation for Functional Validation of Pipelined Microprocessors / Corno, Fulvio; SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo; Squillero, Giovanni. - In: JOURNAL OF ELECTRONIC TESTING. - ISSN 0923-8174. - 20:(2004), pp. 269-278. | 1-gen-2004 | CORNO, FulvioSANCHEZ SANCHEZ, EDGAR ERNESTOSONZA REORDA, MatteoSQUILLERO, Giovanni | - |
| Automatic Verification of RT-Level Microprocessor Cores Using Behavioral Specifications: a Case Study / L., Anghel; SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo; Squillero, Giovanni; R., Velazco. - (2004). (Intervento presentato al convegno Conference on Design of Circuits and Integrated Systems nel November 24-26, 2004). | 1-gen-2004 | SANCHEZ SANCHEZ, EDGAR ERNESTOSONZA REORDA, MatteoSQUILLERO, Giovanni + | - |
| Exploiting HW Acceleration for Classifying Complex Test Program Generation Problems / SANCHEZ SANCHEZ, EDGAR ERNESTO; Squillero, Giovanni; Violante, Massimo. - 3005:(2004), pp. 230-239. (Intervento presentato al convegno EvoWorkshops 2004: EvoBIO, EvoCOMNET, EvoHOT, EvoISAP, EvoMUSART, and EvoSTOC tenutosi a Coimbra nel April 5-7, 2004) [10.1007/978-3-540-24653-4_24]. | 1-gen-2004 | SANCHEZ SANCHEZ, EDGAR ERNESTOSQUILLERO, GiovanniVIOLANTE, MASSIMO | - |
| Coupling different methodologies to validate obsolete microprocessors / L., Anghel; SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo; Squillero, Giovanni; R., Velazco. - (2004), pp. 250-255. (Intervento presentato al convegno Defect and Fault Tolerance in VLSI Systems) [10.1109/DFTVS.2004.1347846]. | 1-gen-2004 | SANCHEZ SANCHEZ, EDGAR ERNESTOSONZA REORDA, MatteoSQUILLERO, Giovanni + | - |
| On the evolution of corewar warriors / Corno, Fulvio; SANCHEZ SANCHEZ, EDGAR ERNESTO; Squillero, Giovanni. - (2004), pp. 2365-2371. (Intervento presentato al convegno Congress on Evolutionary Computation) [10.1109/CEC.2004.1330848]. | 1-gen-2004 | CORNO, FulvioSANCHEZ SANCHEZ, EDGAR ERNESTOSQUILLERO, Giovanni | - |
| A Local Analysis of the Genotype-Fitness Mapping in Hardware Optimization Problems / SANCHEZ SANCHEZ, EDGAR ERNESTO; Squillero, Giovanni; Violante, Massimo. - (2004), pp. 871-878. (Intervento presentato al convegno Congress on Evolutionary Computation) [10.1109/CEC.2004.1330952]. | 1-gen-2004 | SANCHEZ SANCHEZ, EDGAR ERNESTOSQUILLERO, GiovanniVIOLANTE, MASSIMO | - |
| A modular Architecture for a Populationless Evolutionary Algorithm for MIP / SANCHEZ SANCHEZ, EDGAR ERNESTO; Schillaci, Massimiliano; Squillero, Giovanni. - (2005). (Intervento presentato al convegno GSICE05: Giornata di Studio Italiana sul Calcolo Evolutivo tenutosi a Milano nel September 20 2005). | 1-gen-2005 | SANCHEZ SANCHEZ, EDGAR ERNESTOSCHILLACI, MASSIMILIANOSQUILLERO, Giovanni | - |
| Automatic Test Generation for Verifying Microprocessors / Corno, Fulvio; SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo; Squillero, Giovanni. - In: IEEE POTENTIALS. - ISSN 0278-6648. - 24:(2005), pp. 34-37. [10.1109/MP.2005.1405800] | 1-gen-2005 | CORNO, FulvioSANCHEZ SANCHEZ, EDGAR ERNESTOSONZA REORDA, MatteoSQUILLERO, Giovanni | - |
| New Evolutionary Techniques for Test-Program Generation for Complex Microprocessor Cores / SANCHEZ SANCHEZ, EDGAR ERNESTO; Schillaci, Massimiliano; SONZA REORDA, Matteo; Squillero, Giovanni; Sterpone, Luca; Violante, Massimo. - (2005), pp. 2193-2194. (Intervento presentato al convegno Genetic and Evolutionary Computation Conference) [10.1145/1068009.1068370]. | 1-gen-2005 | SANCHEZ SANCHEZ, EDGAR ERNESTOSCHILLACI, MASSIMILIANOSONZA REORDA, MatteoSQUILLERO, GiovanniSTERPONE, LucaVIOLANTE, MASSIMO | - |
| Automatic Completion and Refinement of Verification Sets for Microprocessor Cores / SANCHEZ SANCHEZ, EDGAR ERNESTO; Squillero, Giovanni; SONZA REORDA, Matteo. - (2005), pp. 205-214. (Intervento presentato al convegno EvoWorkkshops 2005: EvoBIO, EvoCOMNET, EvoHOT, EvoIASP, EvoMUSART, and EvoSTOC tenutosi a Lausanne (CHE) nel March 30 - April 1, 2005) [10.110.1007/978-3-540-32003-6_21007/b106856]. | 1-gen-2005 | SANCHEZ SANCHEZ, EDGAR ERNESTOSQUILLERO, GiovanniSONZA REORDA, Matteo | - |
| On the transformation of manufacturing test sets into on-line test sets for microprocessors / SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo; Squillero, Giovanni. - (2005), pp. 494-502. (Intervento presentato al convegno Defect and Fault Tolerance in VLSI Systems (DFT)) [10.1109/DFTVS.2005.53]. | 1-gen-2005 | SANCHEZ SANCHEZ, EDGAR ERNESTOSONZA REORDA, MatteoSQUILLERO, Giovanni | - |
| Automatic completion and refinement of verification sets for microprocessor cores / SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo; Squillero, Giovanni. - STAMPA. - 3449:(2005), pp. 205-214. (Intervento presentato al convegno EvoWorkshops 2005: Applications of Evolutionary Computing) [10.1007/978-3-540-32003-6_21]. | 1-gen-2005 | SANCHEZ SANCHEZ, EDGAR ERNESTOSONZA REORDA, MatteoSQUILLERO, Giovanni | Sánchez2005_Chapter_AutomaticCompletionAndRefineme.pdf |
| Integrating BIST techniques for on-line SoC testing / Bernardi, Paolo; Grosso, Michelangelo; Manzone, A; Rebaudengo, Maurizio; SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo. - (2005), pp. 235-240. (Intervento presentato al convegno IEEE International On-Line Test Symposium IOLTS tenutosi a Saint Raphael, France nel 6-8 Luglio, 2005) [10.1109/IOLTS.2005.38]. | 1-gen-2005 | BERNARDI, PAOLOGROSSO, MICHELANGELOREBAUDENGO, MaurizioSANCHEZ SANCHEZ, EDGAR ERNESTOSONZA REORDA, Matteo + | - |
| Diagnosing faulty functional units in processors by using automatically generated test sets / Bernardi, Paolo; SANCHEZ SANCHEZ, EDGAR ERNESTO; Schillaci, Massimiliano; SONZA REORDA, Matteo; Squillero, Giovanni. - (2005). (Intervento presentato al convegno Sixth International Workshop on Microprocessor Test and Verification, 2005. MTV '05 tenutosi a Austin, TX (USA) nel 3-5 Nov. 2005) [10.1109/MTV.2005.10]. | 1-gen-2005 | BERNARDI, PAOLOSANCHEZ SANCHEZ, EDGAR ERNESTOSCHILLACI, MASSIMILIANOSONZA REORDA, MatteoSQUILLERO, Giovanni | - |
| Automatic Generation of Test Sets for SBST of Microprocessor IP Cores / SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo; Squillero, Giovanni; Violante, Massimo. - (2005), pp. 74-79. (Intervento presentato al convegno 18th Symposium on Integrated Circuits and Systems Design, SBCCI) [10.1145/1081081.1081105]. | 1-gen-2005 | SANCHEZ SANCHEZ, EDGAR ERNESTOSONZA REORDA, MatteoSQUILLERO, GiovanniVIOLANTE, MASSIMO | - |
| Test Program Generation from High-level Microprocessor Descriptions / SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo; Squillero, Giovanni - In: System-level Test and Validation of Hardware/Software Systems / AA.VV.. - STAMPA. - BERLIN : Springer, 2005. - ISBN 9781852338992. - pp. 83-106 [10.1007/1-84628-145-8_6] | 1-gen-2005 | SANCHEZ SANCHEZ, EDGAR ERNESTOSONZA REORDA, MatteoSQUILLERO, Giovanni | - |
| Evolving assembly programs: how games help microprocessor validation / Corno, Fulvio; SANCHEZ SANCHEZ, EDGAR ERNESTO; Squillero, Giovanni. - In: IEEE TRANSACTIONS ON EVOLUTIONARY COMPUTATION. - ISSN 1089-778X. - 9:6(2005), pp. 695-706. [10.1109/TEVC.2005.856207] | 1-gen-2005 | CORNO, FulvioSANCHEZ SANCHEZ, EDGAR ERNESTOSQUILLERO, Giovanni | tec2005.pdf; tec05.pdf |