statistiche ricercatore

Nazione	#
US - Stati Uniti d'America	2.846
IT - Italia	634
GB - Regno Unito	342
DE - Germania	322
FR - Francia	294
CN - Cina	195
SG - Singapore	178
UA - Ucraina	100
NL - Olanda	72
RU - Federazione Russa	56
TR - Turchia	46
BR - Brasile	45
GR - Grecia	44
SE - Svezia	44
KR - Corea	41
CA - Canada	38
JP - Giappone	30
HK - Hong Kong	29
IE - Irlanda	28
CH - Svizzera	27
AT - Austria	19
VN - Vietnam	19
FI - Finlandia	18
JO - Giordania	14
IN - India	12
ID - Indonesia	10
ZA - Sudafrica	8
BE - Belgio	6
ES - Italia	6
PL - Polonia	6
CL - Cile	5
AE - Emirati Arabi Uniti	4
IR - Iran	4
RO - Romania	4
AU - Australia	3
BD - Bangladesh	3
DK - Danimarca	3
IL - Israele	3
SN - Senegal	3
VE - Venezuela	3
BY - Bielorussia	2
GH - Ghana	2
IQ - Iraq	2
LV - Lettonia	2
NO - Norvegia	2
SA - Arabia Saudita	2
TW - Taiwan	2
AP - ???statistics.table.value.countryCode.AP???	1
BG - Bulgaria	1
CZ - Repubblica Ceca	1
EE - Estonia	1
EU - Europa	1
HN - Honduras	1
HU - Ungheria	1
KW - Kuwait	1
KZ - Kazakistan	1
LT - Lituania	1
MD - Moldavia	1
MX - Messico	1
MY - Malesia	1
NP - Nepal	1
NZ - Nuova Zelanda	1
PH - Filippine	1
PK - Pakistan	1
PY - Paraguay	1
SI - Slovenia	1
TN - Tunisia	1
Totale	5.598

Nome	#
A Hybrid Fault Injection Methodology for Real Time Systems	607
A case study for NoC based homogeneous MPSoC architectures	592
FPGA-based Fault Injection Techniques for Fast Evaluation of Fault Tolerance in VLSI Circuits	516
Adaptive Latency Insensitive Protocols	496
Throughput-driven floorplanning with wire pipelining.	462
Floorplanning with wire pipelining in adaptive communication channels	436
A new system design methodology for wire pipelined SoC	423
Issues in Implementing Latency Insensitive Protocols	410
Adaptive Latency Insensitive Protocols andElastic Circuits with Early Evaluation: A Comparative Analysis	370
On-Chip Transparent Wire Pipelining (invited paper)	300
A New Approach to Latency Insensitive Design	287
Implementation Analysis of NoC: A MPSoC Trace-Driven Approach	271
Floorplanning for Throughput	263
Floorplan assisted data rate enhancement through wire pipelining: a real assessment	223
Totale	5.656

	Totale	Lug	Ago	Sett	Ott	Nov	Dic	Gen	Feb	Mar	Apr	Mag	Giu
2020/2021	191	0	0	0	0	19	41	11	33	16	32	19	20
2021/2022	224	6	21	0	5	14	25	24	9	9	24	39	48
2022/2023	768	31	64	17	43	36	51	399	21	50	5	25	26
2023/2024	88	12	7	4	3	13	14	5	1	2	4	6	17
2024/2025	330	1	51	15	30	36	22	5	30	51	30	36	23
2025/2026	262	35	52	31	90	54	0	0	0	0	0	0	0
Totale													5.656

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