Radiation-induced soft errors have become a significant reliability challenge in modern CMOS logic. The main concern for safety-critical applications such aerospace is due to Single Event Transient (SET) effects. SETs are exacerbated by the technology scaling of modern technologies especially when they are adopted in harsh environments. This paper evaluates the SET sensitivity of state-of-the-art floating gate configurable logic circuit and proposes a novel methodology for filtering a SET pulse generated inside the logic cells by increasing the charge sharing effect on the sensitive node of a cell due to remapping of its configurable switches. Experimental results, performed with radiation particle simulation on several benchmark circuits implemented in a 130nm floating-gate device demonstrate an improvement in filtering SET effects of more than 24% on the average with negligible delay degradation.

A New Single Event Transient Hardened Floating Gate Configurable Logic Circuit / Azimi, Sarah; De Sio, Corrado; Yang, Weitao; Sterpone, Luca. - ELETTRONICO. - (2020), pp. 311-314. ((Intervento presentato al convegno 18th IEEE International NEWCAS tenutosi a Montreal, Canada nel June 16-19, 2020 [10.1109/NEWCAS49341.2020.9159844].

A New Single Event Transient Hardened Floating Gate Configurable Logic Circuit

Sarah Azimi;Corrado De Sio;Weitao Yang;Luca Sterpone
2020

Abstract

Radiation-induced soft errors have become a significant reliability challenge in modern CMOS logic. The main concern for safety-critical applications such aerospace is due to Single Event Transient (SET) effects. SETs are exacerbated by the technology scaling of modern technologies especially when they are adopted in harsh environments. This paper evaluates the SET sensitivity of state-of-the-art floating gate configurable logic circuit and proposes a novel methodology for filtering a SET pulse generated inside the logic cells by increasing the charge sharing effect on the sensitive node of a cell due to remapping of its configurable switches. Experimental results, performed with radiation particle simulation on several benchmark circuits implemented in a 130nm floating-gate device demonstrate an improvement in filtering SET effects of more than 24% on the average with negligible delay degradation.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/2838599