Archivio Istituzionale della RicercaVideo compression deeply relies on motion estima- tion but this crucial step requires power-hungry computational resources. Starting from an existing architecture capable of calculating a high number of Sum of Absolute Differences (SADs), three possible locations for approximate adders are chosen. At each location, different types of approximate adders are implemented and the results are analyzed in terms of error and power saving.
Approximate-Computing Architectures for Motion Estimation in HEVC / Paltrinieri, Alberto; Peloso, Riccardo; Masera, Guido; Shafique, Muhammad; Martina, Maurizio. - ELETTRONICO. - 1:(2018), pp. 190-193. (Intervento presentato al convegno New Generation of CAS (NGCAS) tenutosi a Valletta (Malta) nel 13 dicembre 2019) [10.1109/NGCAS.2018.8572080].
Approximate-Computing Architectures for Motion Estimation in HEVC
Peloso, Riccardo;Masera, Guido;Martina, Maurizio
2018
Abstract
Video compression deeply relies on motion estima- tion but this crucial step requires power-hungry computational resources. Starting from an existing architecture capable of calculating a high number of Sum of Absolute Differences (SADs), three possible locations for approximate adders are chosen. At each location, different types of approximate adders are implemented and the results are analyzed in terms of error and power saving.
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https://hdl.handle.net/11583/2722061
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