MORI', PIERPAOLO
MORI', PIERPAOLO
Dipartimento di Elettronica e Telecomunicazioni
050522
Adversarial Robustness of Multi-bit Convolutional Neural Networks
2024 Frickenstein, L.; Sampath, S. B.; Mori', Pierpaolo; Vemparala, M. -R.; Fasfous, N.; Frickenstein, A.; Unger, C.; Passerone, C.; Stechele, W.
MATAR: Multi-Quantization-Aware Training for Accurate and Fast Hardware Retargeting
2024 Mori, Pierpaolo; Thoma, Moritz; Frickenstein, Lukas; Balamuthu Sampath, Shambhavi; Fasfous, Nael; Rohit Vemparala, Manoj; Frickenstein, Alexander; Stechele, Walter; Mueller-Gritschneder, Daniel; Passerone, Claudio
Wino Vidi Vici: Conquering Numerical Instability of 8-Bit Winograd Convolution for Accurate Inference Acceleration on Edge
2024 Mori, Pierpaolo; Frickenstein, Lukas; Balamuthu Sampath, Shambhavi; Thoma, Moritz; Fasfous, Nael; Rohit Vemparala, Manoj; Frickenstein, Alexander; Unger, Christian; Stechele, Walter; Mueller-Gritschneder, Daniel; Passerone, Claudio
WinoTrain: Winograd-Aware Training for Accurate Full 8-bit Convolution Acceleration
2023 Mori, Pierpaolo; Sampath, Shambhavi-Balamuthu; Frickenstein, Lukas; Vemparala, Manoj-Rohit; Fasfous, Nael; Frickenstein, Alexander; Stechele, Walter; Passerone, Claudio
Accelerating and pruning CNNs for semantic segmentation on FPGA
2022 Mori, Pierpaolo; Vemparala, Manoj-Rohit; Fasfous, Nael; Mitra, Saptarshi; Sarkar, Sreetama; Frickenstein, Alexander; Frickenstein, Lukas; Helms, Domenik; Nagaraja, Naveen-Shankar; Stechele, Walter; Passerone, Claudio
HW-Flow-Fusion: Inter-Layer Scheduling for Convolutional Neural Network Accelerators with Dataflow Architectures
2022 Valpreda, Emanuele; Mori, Pierpaolo; Fasfous, Nael; Vemparala, Manoj Rohit; Frickenstein, Alexander; Frickenstein, Lukas; Stechele, Walter; Passerone, Claudio; Masera, Guido; Martina, Maurizio
Citazione | Data di pubblicazione | Autori | File |
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Adversarial Robustness of Multi-bit Convolutional Neural Networks / Frickenstein, L.; Sampath, S. B.; Mori', Pierpaolo; Vemparala, M. -R.; Fasfous, N.; Frickenstein, A.; Unger, C.; Passerone, C.; Stechele, W.. - STAMPA. - (2024), pp. 157-174. (Intervento presentato al convegno IntelliSys 2023) [10.1007/978-3-031-47715-7_12]. | 1-gen-2024 | Mori PierpaoloPasserone C. + | intellisys23_final.pdf; _Accept__IntelliSys23___Adversarial_Robustness_of_MBNs.pdf |
- | 1-gen-2024 | Pierpaolo MoriClaudio Passerone + | - |
Wino Vidi Vici: Conquering Numerical Instability of 8-Bit Winograd Convolution for Accurate Inference Acceleration on Edge / Mori, Pierpaolo; Frickenstein, Lukas; Balamuthu Sampath, Shambhavi; Thoma, Moritz; Fasfous, Nael; Rohit Vemparala, Manoj; Frickenstein, Alexander; Unger, Christian; Stechele, Walter; Mueller-Gritschneder, Daniel; Passerone, Claudio. - ELETTRONICO. - (2024), pp. 53-62. (Intervento presentato al convegno Winter Conference on Applications of Computer Vision (WACV)). | 1-gen-2024 | Pierpaolo MoriClaudio Passerone + | _Writing__WACV2024___WinoWidiWici (5).pdf |
WinoTrain: Winograd-Aware Training for Accurate Full 8-bit Convolution Acceleration / Mori, Pierpaolo; Sampath, Shambhavi-Balamuthu; Frickenstein, Lukas; Vemparala, Manoj-Rohit; Fasfous, Nael; Frickenstein, Alexander; Stechele, Walter; Passerone, Claudio. - ELETTRONICO. - (2023), pp. 1-6. (Intervento presentato al convegno Proceedings of the 60th ACM/IEEE Design Automation Conference tenutosi a San Francisco, CA, USA nel 09-13 July 2023) [10.1109/DAC56929.2023.10247805]. | 1-gen-2023 | Mori, PierpaoloPasserone, Claudio + | WinoTrain_Winograd-Aware_Training_for_Accurate_Full_8-bit_Convolution_Acceleration.pdf; _Accept__WinoTrain__Winograd_Aware_Training_for_Accurate_Full_8_bit_Convolution_Acceleration.pdf |
Accelerating and pruning CNNs for semantic segmentation on FPGA / Mori, Pierpaolo; Vemparala, Manoj-Rohit; Fasfous, Nael; Mitra, Saptarshi; Sarkar, Sreetama; Frickenstein, Alexander; Frickenstein, Lukas; Helms, Domenik; Nagaraja, Naveen-Shankar; Stechele, Walter; Passerone, Claudio. - STAMPA. - DAC '22: Proceedings of the 59th ACM/IEEE Design Automation Conference:(2022), pp. 145-150. (Intervento presentato al convegno Proceedings of the 59th ACM/IEEE Design Automation Conference tenutosi a San Francisco (USA) nel 10-14 luglio 2022) [10.1145/3489517.3530424]. | 1-gen-2022 | Mori, PierpaoloPasserone,Claudio + | 3489517.3530424.pdf |
HW-Flow-Fusion: Inter-Layer Scheduling for Convolutional Neural Network Accelerators with Dataflow Architectures / Valpreda, Emanuele; Mori, Pierpaolo; Fasfous, Nael; Vemparala, Manoj Rohit; Frickenstein, Alexander; Frickenstein, Lukas; Stechele, Walter; Passerone, Claudio; Masera, Guido; Martina, Maurizio. - In: ELECTRONICS. - ISSN 2079-9292. - ELETTRONICO. - 11:18(2022), p. 2933. [10.3390/electronics11182933] | 1-gen-2022 | Valpreda, EmanueleMori, PierpaoloPasserone, ClaudioMasera, GuidoMartina, Maurizio + | electronics-11-02933-1.pdf; HW_Flow_Fusion__Inter_Layer_Scheduling_for_Convolutional_Neural_Network_Accelerators_with_Dataflow_Architectures.pdf |