statistiche ricercatore

Continente	#
EU - Europa	2.006
NA - Nord America	1.285
AS - Asia	189
SA - Sud America	7
OC - Oceania	3
Continente sconosciuto - Info sul continente non disponibili	2
Totale	3.492

Nazione	#
US - Stati Uniti d'America	1.276
IT - Italia	852
GB - Regno Unito	458
DE - Germania	281
FR - Francia	179
CN - Cina	78
UA - Ucraina	58
AT - Austria	38
IE - Irlanda	28
TR - Turchia	28
CH - Svizzera	27
KR - Corea	24
SE - Svezia	18
JO - Giordania	16
BE - Belgio	15
MY - Malesia	15
FI - Finlandia	12
NL - Olanda	10
CA - Canada	8
EU - Europa	7
IN - India	7
ID - Indonesia	5
RU - Federazione Russa	5
SG - Singapore	5
HK - Hong Kong	4
IR - Iran	4
AU - Australia	3
BY - Bielorussia	3
CL - Cile	3
EE - Estonia	3
HR - Croazia	3
JP - Giappone	3
BR - Brasile	2
IL - Israele	2
RO - Romania	2
AE - Emirati Arabi Uniti	1
AL - Albania	1
AR - Argentina	1
CO - Colombia	1
CZ - Repubblica Ceca	1
DK - Danimarca	1
HN - Honduras	1
PK - Pakistan	1
SK - Slovacchia (Repubblica Slovacca)	1
TW - Taiwan	1
Totale	3.492

Nome	#
Fast Cone-Of-Influence Computation and Estimation in Problems with Multiple Properties	380
To Split or to Group: From Divide-and-Conquer to Sub-Task Sharing for Verifying Multiple Properties in Model Checking	320
Hardware Model Checking Competition 2014: An Analysis and Comparison of Model Checkers and Benchmarks	291
Interpolation with Guided Refinement: revisiting incrementality in SAT-based Unbounded Model Checking	263
SAT solver management strategies in IC3: an experimental approach	261
Test Time Minimization in Reconfigurable Scan Networks	255
Reducing Interpolant Circuit Size by Ad Hoc Logic Synthesis and SAT-Based Weakening	250
A 7/2-approximation algorithm for the Maximum Duo-Preservation String Mapping Problem	245
Optimizing Binary Decision Diagrams for Interpretable Machine Learning Classification	237
Trading-off Incrementality and Dynamic Restart of Multiple Solvers in IC3	221
Interpolation-based learning as a mean to speed-up Bounded Model Checking	191
Logic Synthesis for Interpolant Circuit Compaction	139
Exploiting Boolean Satisfiability Solvers for High Performance Bit-Level Model Checking	131
Test of Reconfigurable Modules in Scan Networks	128
Reducing interpolant circuit size through SAT-based weakening	122
Interpolation with guided refinement: revisiting incrementality in SAT-based unbounded model checking	102
Optimizing Binary Decision Diagrams for Interpretable Machine Learning Classification	2
Totale	3.538

	Totale	Lug	Ago	Sett	Ott	Nov	Dic	Gen	Feb	Mar	Apr	Mag	Giu
2018/2019	195	0	0	0	0	0	0	0	0	0	69	58	68
2019/2020	477	34	24	17	77	70	47	61	51	54	22	11	9
2020/2021	322	33	45	11	26	8	41	19	36	37	27	32	7
2021/2022	308	22	31	5	24	11	28	21	10	39	13	39	65
2022/2023	432	27	64	9	45	38	88	26	31	55	4	17	28
2023/2024	177	9	3	20	23	23	38	13	21	17	10	0	0
Totale													3.538

PORTO @ Archivio Istituzionale della Ricerca