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An Error-Detection and Self-Repairing Method for Dynamically and Partially Reconfigurable Systems
2017 SONZA REORDA, Matteo; Sterpone, Luca; Ullah, Anees
An FPGA-based dynamically reconfigurable platform for emulation of permanent faults in ASICs
2017 Ullah, A.; Sanchez, E.; Sterpone, L.; Cardona, L. A.; Ferrer, C.
Recovery Time and Fault Tolerance Improvement for Circuits mapped on SRAM-based FPGAs
2014 Ullah, Anees; Sterpone, Luca
| Citazione | Data di pubblicazione | Autori | File |
|---|---|---|---|
| An Error-Detection and Self-Repairing Method for Dynamically and Partially Reconfigurable Systems / SONZA REORDA, Matteo; Sterpone, Luca; Ullah, Anees. - In: IEEE TRANSACTIONS ON COMPUTERS. - ISSN 0018-9340. - ELETTRONICO. - 66:6(2017), pp. 1022-1033. [10.1109/TC.2016.2607749] | 1-gen-2017 | SONZA REORDA, MatteoSTERPONE, LUCAULLAH, ANEES | 07563888.pdf; 07563888.pdf |
| An FPGA-based dynamically reconfigurable platform for emulation of permanent faults in ASICs / Ullah, A.; Sanchez, E.; Sterpone, L.; Cardona, L. A.; Ferrer, C.. - In: MICROELECTRONICS RELIABILITY. - ISSN 0026-2714. - STAMPA. - 75:(2017), pp. 110-120. [10.1016/j.microrel.2017.06.032] | 1-gen-2017 | Ullah, A.Sanchez, E.Sterpone, L. + | fpga_fault_sim.pdf |
| Recovery Time and Fault Tolerance Improvement for Circuits mapped on SRAM-based FPGAs / Ullah, Anees; Sterpone, Luca. - In: JOURNAL OF ELECTRONIC TESTING. - ISSN 0923-8174. - 30:(2014), pp. 425-442. [10.1007/s10836-014-5463-7] | 1-gen-2014 | ULLAH, ANEESSTERPONE, Luca | - |