Archivio Istituzionale della RicercaDESOGUS, MARCO
Mostra
records
Risultati 1 - 5 di 5 (tempo di esecuzione: 0.014 secondi).
Hardening Dynamically Reconfigurable Processing Modules Architectures: A Neutron Test Experience
In corso di stampa Desogus, Marco; Sterpone, Luca; Sabena, Davide; Ullah, Anees; Mario, Porrmann; Jens, Hagemeyer; Jorgan, Ilstad
Analysis and mitigation of SEUs in ARM-based SoC on Xilinx Virtex-V SRAM-based FPGAS
2015 Du, Boyang; Desogus, Marco; Sterpone, Luca
Using Benchmarks for Radiation Testing of Microprocessors and FPGAs
2015 Quinn, Heather; Robinson, William H.; Rech, Paolo; Aguirre, Miguel; Barnard, Arno; Desogus, Marco; Entrena, Luis; Garcia Valderas, Mario; Guertin, Steven M.; Kaeli, David; Kastensmidt, Fernanda Lima; Kiddie, Bradley T.; Sanchez Clemente, Antonio; SONZA REORDA, Matteo; Sterpone, Luca; Wirthlin, Michael
Validation of a tool for estimating the effects of Soft- Errors on modern SRAM-based FPGAs
2014 Desogus, Marco; Sterpone, Luca; David Merodio, Codinachs
Validation and robustness assessment of an automotive system
2013 Desogus, Marco; SONZA REORDA, Matteo; Sterpone, Luca; Avantaggiati, V. A.; Audisio, G.; Sabatini, M.
| Citazione | Data di pubblicazione | Autori | File |
|---|---|---|---|
| Hardening Dynamically Reconfigurable Processing Modules Architectures: A Neutron Test Experience / Desogus, M., Sterpone, L., Sabena, D., Ullah, A., Mario, P., Jens, H., Jorgan, I.. - (In corso di stampa). (Radiation Effects on Components and Systems 2013 ). | In corso di stampa | DESOGUS, MARCOSTERPONE, LucaSABENA, DAVIDEULLAH, ANEES + | - |
| Analysis and mitigation of SEUs in ARM-based SoC on Xilinx Virtex-V SRAM-based FPGAS / Du, B., Desogus, M., Sterpone, L.. - (2015), pp. 236-239. (11th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2015 gbr 2015) [10.1109/PRIME.2015.7251378]. | 1-gen-2015 | DU, BOYANGDESOGUS, MARCOSTERPONE, LUCA | - |
| Using Benchmarks for Radiation Testing of Microprocessors and FPGAs / Quinn, H., Robinson, W.H., Rech, P., Aguirre, M., Barnard, A., Desogus, M., Entrena, L., Garcia Valderas, M., Guertin, S.M., Kaeli, D., Kastensmidt, F.L., Kiddie, B.T., Sanchez Clemente, A., SONZA REORDA, M., Sterpone, L., Wirthlin, M.. - In: IEEE TRANSACTIONS ON NUCLEAR SCIENCE. - ISSN 0018-9499. - ELETTRONICO. - 62:6(2015), pp. 2547-2554. [10.1109/TNS.2015.2498313] | 1-gen-2015 | RECH, PAOLODESOGUS, MARCOSONZA REORDA, MatteoSTERPONE, LUCA + | 07348783.pdf |
| Validation of a tool for estimating the effects of Soft- Errors on modern SRAM-based FPGAs / Desogus, M., Sterpone, L., David Merodio, C.. - ELETTRONICO. - (2014), pp. 111-115. (IEEE 20th International On-Line Testing Symposium Platja d’Aro, Catalunya, Spain 7 - 9 July 2014). | 1-gen-2014 | DESOGUS, MARCOSTERPONE, Luca + | - |
| Validation and robustness assessment of an automotive system / Desogus, M., SONZA REORDA, M., Sterpone, L., Avantaggiati, V.A., Audisio, G., Sabatini, M.. - ELETTRONICO. - (2013). (8th IEEE International Design & Test Symposium (IDT) Marrakech 16-18 Dicembre 2013). | 1-gen-2013 | DESOGUS, MARCOSONZA REORDA, MatteoSTERPONE, Luca + | - |