Archivio Istituzionale della RicercaCAUSAPRUNO, GIOVANNI
CAUSAPRUNO, GIOVANNI
Dipartimento di Elettronica e Telecomunicazioni
028802
Exploiting the Logic-In-Memory paradigm for speeding-up data-intensive algorithms
2019 Cofano, M.; Vacca, M.; Santoro, G.; Causapruno, G.; Turvani, G.; Graziano, M.
Parallel and Serial Computation in Nanomagnet Logic: An Overview
2018 Giri, Davide; Causapruno, Giovanni; Riente, Fabrizio
Reconfigurable Systolic Array: From Architecture to Physical Design for NML
2016 Causapruno, Giovanni; Riente, Fabrizio; Turvani, Giovanna; Vacca, Marco; RUO ROCH, Massimo; Zamboni, Maurizio; Graziano, Mariagrazia
Interleaving in Systolic-Arrays: a Throughput Breakthrough
2015 Causapruno, Giovanni; Vacca, Marco; Graziano, Mariagrazia; Zamboni, Maurizio
Protein Alignment Systolic Array Throughput Optimization
2015 Causapruno, Giovanni; Urgese, Gianvito; Vacca, Marco; Graziano, Mariagrazia; Zamboni, Maurizio
| Citazione | Data di pubblicazione | Autori | File |
|---|---|---|---|
| Exploiting the Logic-In-Memory paradigm for speeding-up data-intensive algorithms / Cofano, M., Vacca, M., Santoro, G., Causapruno, G., Turvani, G., Graziano, M.. - In: INTEGRATION. - ISSN 0167-9260. - STAMPA. - 66:(2019), pp. 153-163. [10.1016/j.vlsi.2019.02.007] | 1-gen-2019 | Vacca M.Santoro G.Causapruno G.Turvani G.Graziano M. + | lim_main.pdf; 1-s2.0-S016792601830556X-main.pdf |
| Parallel and Serial Computation in Nanomagnet Logic: An Overview / Giri, D., Causapruno, G., Riente, F.. - In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS. - ISSN 1063-8210. - 26:8(2018), pp. 1427-1437. [10.1109/TVLSI.2018.2821107] | 1-gen-2018 | Causapruno, GiovanniRiente, Fabrizio + | - |
| Reconfigurable Systolic Array: From Architecture to Physical Design for NML / Causapruno, G., Riente, F., Turvani, G., Vacca, M., RUO ROCH, M., Zamboni, M., Graziano, M.. - In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS. - ISSN 1063-8210. - ELETTRONICO. - 24:11(2016), pp. 3208-3217. [10.1109/TVLSI.2016.2547422] | 1-gen-2016 | CAUSAPRUNO, GIOVANNIRIENTE, FABRIZIOTURVANI, GIOVANNAVACCA, MARCORUO ROCH, MassimoZAMBONI, MaurizioGRAZIANO, MARIAGRAZIA | 07454779.pdf; tvlsi_RSA.pdf |
| Interleaving in Systolic-Arrays: a Throughput Breakthrough / Causapruno, G., Vacca, M., Graziano, M., Zamboni, M.. - In: IEEE TRANSACTIONS ON COMPUTERS. - ISSN 0018-9340. - STAMPA. - 64:7(2015), pp. 1940-1953. [10.1109/TC.2014.2346208] | 1-gen-2015 | CAUSAPRUNO, GIOVANNIVACCA, MARCOGRAZIANO, MARIAGRAZIAZAMBONI, Maurizio | TCOMPU-systolic.pdf |
| Protein Alignment Systolic Array Throughput Optimization / Causapruno, G., Urgese, G., Vacca, M., Graziano, M., Zamboni, M.. - In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS. - ISSN 1063-8210. - STAMPA. - 23:1(2015), pp. 68-77. [10.1109/TVLSI.2014.2302015] | 1-gen-2015 | CAUSAPRUNO, GIOVANNIURGESE, GIANVITOVACCA, MARCOGRAZIANO, MARIAGRAZIAZAMBONI, Maurizio | TVLSI-protein-alignement.pdf; TVLSI-protein-alignement.pdf |