Archivio Istituzionale della RicercaSfoglia per Autore
Temporal Discharge Current Driven Clustering for Improved Leakage Power Reduction in Row-Based Power-Gating
2008 Sathanur, A; Benini, L; Macii, Alberto; Macii, Enrico; Poncino, Massimo
Implementation of a thermal management unit for canceling temperature-dependent clock skew variations
2008 Macii, Alberto; Chakraborty, A; Duraisami, Karthik; VISWESWARA SATHANUR, Ashoka; Sithambaram, P; Macii, Enrico; Poncino, Massimo
Multiple power-gating domain (multi-VGND)architecture for improved leakage power reduction
2008 VISWESWARA SATHANUR, Ashoka; Luca, Benini; Macii, Alberto; Macii, Enrico; Poncino, Massimo
Thermal-Aware Design Techniques for Nanometer CMOS Circuits
2008 Calimera, Andrea; Duraisami, Karthik; VISWESWARA SATHANUR, Ashoka; Sithambaram, P; Bahar, I; Macii, Alberto; Macii, Enrico; Poncino, Massimo
Enhanced Switching Activity Balancing Encoding Schemes for Uniform Temperature Distribution in On-Chip Buses
2009 Sithambaram, P; Macii, Alberto; Macii, Enrico
Enabling concurrent clock and power gating in an industrial design flow
2009 Bolzani, L.; Calimera, Andrea; Macii, Alberto; Macii, Enrico; Poncino, Massimo
Placement-aware clustering for integrated clock and power gating
2009 Bozani, L.; Calimera, Andrea; Macii, Alberto; Macii, Enrico; Poncino, Massimo
Reducing Timing Overhead in Simultaneously Clock-Gated and Power-Gated Designs by Placement-Aware Clustering
2009 Upasani, G.; Calimera, Andrea; Macii, Alberto; Macii, Enrico; Poncino, Massimo
Exploiting Temporal Discharge Current Information to Improve the Efficiency of Clustered Power-Gating
2009 Sathanur, A; Benini, L; Macii, Alberto; Macii, Enrico; Poncino, Massimo
Design of a Flexible Reactivation Cell for Safe Power-Mode Transition in Power-Gated Circuits
2009 Calimera, Andrea; Benini, L; Macii, Alberto; Macii, Enrico; Poncino, Massimo
Preface of the 2010 IAENG International Conference on Electrical Engineering Special Session: Design, Analysis and Tools for Integrated Circuits and Systems. Newswood Limited.
2010 Macii, Alberto
An integrated thermal estimation framework for industrial embedded platforms
2010 Acquaviva, Andrea; Calimera, Andrea; Macii, Alberto; Poncino, Massimo; Macii, Enrico; Giaconia, M.; Parrella, G.
An integrated thermal estimation framework for industrial embedded platforms.
2010 Acquaviva, Andrea; Calimera, Andrea; Macii, Alberto; Poncino, Massimo; Macii, Enrico; Matteo, Giaconia; Claudio, Parrella
THERMINATOR: Modeling, control and management of thermal effects in electronic circuits of the future
2010 Calimera, Andrea; Macii, Alberto; Macii, Enrico; S., Rinaudo; Poncino, Massimo
Minimizing temperature sensitivity of dual-Vt CMOS circuits using Simulated-Annealing on ISING-like models
2010 M., Caldera; Calimera, Andrea; Macii, Alberto; Macii, Enrico; Poncino, Massimo
Power-aware partitioning of data converters
2010 Bonanno, Alberto; Bocca, Alberto; Macii, Alberto; Macii, Enrico
Data-Driven Clock Gating for Digital Filters
2010 Bonanno, Alberto; Bocca, Alberto; Macii, Alberto; Macii, Enrico; Poncino, Massimo
A refinement methodology for clock gating optimization at layout level in digital circuits
2010 Benini, L.; Bonanno, Alberto; Bocca, Alberto; Macii, Alberto; Macii, Enrico; Nagel, J. L.; Piguet, C.; Poncino, Massimo
Thermal-Aware Clock Tree Design to Increase Timing Reliability of Embedded SoCs
2010 Chakraborty, A.; Duraisami, k. sithambaram p.; Macii, Alberto; Macii, Enrico; Poncino, Massimo
Preface of the 2011 IAENG International Conference on Electrical Engineering Special Session: Design, Analysis and Tools for Integrated Circuits and Systems
2011 Macii, Alberto
| Citazione | Data di pubblicazione | Autori | File |
|---|---|---|---|
| Temporal Discharge Current Driven Clustering for Improved Leakage Power Reduction in Row-Based Power-Gating / Sathanur, A; Benini, L; Macii, Alberto; Macii, Enrico; Poncino, Massimo. - (2008), pp. 42-51. (Intervento presentato al convegno PATMOS-08: IEEE International Workshop on Power and Timing Modeling, Optimization and Simulation tenutosi a Lisboa, Portugal nel September 2008) [10.1007/978-3-540-95948-9_5]. | 1-gen-2008 | MACII, AlbertoMACII, EnricoPONCINO, MASSIMO + | - |
| Implementation of a thermal management unit for canceling temperature-dependent clock skew variations / Macii, Alberto; Chakraborty, A; Duraisami, Karthik; VISWESWARA SATHANUR, Ashoka; Sithambaram, P; Macii, Enrico; Poncino, Massimo. - In: INTEGRATION. - ISSN 0167-9260. - 41:1(2008), pp. 2-8. [10.1016/j.vlsi.2007.03.002] | 1-gen-2008 | MACII, AlbertoDURAISAMI, KARTHIKVISWESWARA SATHANUR, ASHOKAMACII, EnricoPONCINO, MASSIMO + | - |
| Multiple power-gating domain (multi-VGND)architecture for improved leakage power reduction / VISWESWARA SATHANUR, Ashoka; Luca, Benini; Macii, Alberto; Macii, Enrico; Poncino, Massimo. - (2008), pp. 51-56. (Intervento presentato al convegno ISLPED-08:International Symposium on Low Power Electronics and Design tenutosi a Bangalore, India) [10.1145/1393921.1393938]. | 1-gen-2008 | VISWESWARA SATHANUR, ASHOKAMACII, AlbertoMACII, EnricoPONCINO, MASSIMO + | - |
| Thermal-Aware Design Techniques for Nanometer CMOS Circuits / Calimera, Andrea; Duraisami, Karthik; VISWESWARA SATHANUR, Ashoka; Sithambaram, P; Bahar, I; Macii, Alberto; Macii, Enrico; Poncino, Massimo. - In: JOURNAL OF LOW POWER ELECTRONICS. - ISSN 1546-1998. - 3:(2008), pp. 374-384. [10.1166/jolpe.2008.190] | 1-gen-2008 | CALIMERA, ANDREADURAISAMI, KARTHIKVISWESWARA SATHANUR, ASHOKAMACII, AlbertoMACII, EnricoPONCINO, MASSIMO + | - |
| Enhanced Switching Activity Balancing Encoding Schemes for Uniform Temperature Distribution in On-Chip Buses / Sithambaram, P; Macii, Alberto; Macii, Enrico. - In: JOURNAL OF EMBEDDED COMPUTING. - ISSN 1740-4460. - 3:(2009), pp. 155-165. [10.3233/JEC-2009-0088] | 1-gen-2009 | MACII, AlbertoMACII, Enrico + | - |
| Enabling concurrent clock and power gating in an industrial design flow / Bolzani, L.; Calimera, Andrea; Macii, Alberto; Macii, Enrico; Poncino, Massimo. - (2009), pp. 334-339. (Intervento presentato al convegno Design, Automation and Test in Europe Conference and Exhibition, DATE '09 tenutosi a Nice (FRA) nel 20-24 April 2009). | 1-gen-2009 | CALIMERA, ANDREAMACII, AlbertoMACII, EnricoPONCINO, MASSIMO + | - |
| Placement-aware clustering for integrated clock and power gating / Bozani, L.; Calimera, Andrea; Macii, Alberto; Macii, Enrico; Poncino, Massimo. - (2009), pp. 1723-1726. (Intervento presentato al convegno IEEE International Symposium on Circuits and Systems, ISCAS 2009 tenutosi a Taipei, Taiwan nel 24-27 May 2009) [10.1109/ISCAS.2009.5118107]. | 1-gen-2009 | CALIMERA, ANDREAMACII, AlbertoMACII, EnricoPONCINO, MASSIMO + | - |
| Reducing Timing Overhead in Simultaneously Clock-Gated and Power-Gated Designs by Placement-Aware Clustering / Upasani, G.; Calimera, Andrea; Macii, Alberto; Macii, Enrico; Poncino, Massimo. - 5953:(2009), pp. 227-236. (Intervento presentato al convegno 19th International Workshop, PATMOS 2009 tenutosi a Delft (NLD) nel September 9-11, 2009,) [10.1007/978-3-642-11802-9_27]. | 1-gen-2009 | CALIMERA, ANDREAMACII, AlbertoMACII, EnricoPONCINO, MASSIMO + | - |
| Exploiting Temporal Discharge Current Information to Improve the Efficiency of Clustered Power-Gating / Sathanur, A; Benini, L; Macii, Alberto; Macii, Enrico; Poncino, Massimo. - In: JOURNAL OF LOW POWER ELECTRONICS. - ISSN 1546-1998. - 5:1(2009), pp. 113-121. [10.1166/jolpe.2009.1004] | 1-gen-2009 | MACII, AlbertoMACII, EnricoPONCINO, MASSIMO + | - |
| Design of a Flexible Reactivation Cell for Safe Power-Mode Transition in Power-Gated Circuits / Calimera, Andrea; Benini, L; Macii, Alberto; Macii, Enrico; Poncino, Massimo. - In: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS. - ISSN 1549-8328. - 56:9(2009), pp. 1979-1993. [10.1109/TCSI.2008.2010151] | 1-gen-2009 | CALIMERA, ANDREAMACII, AlbertoMACII, EnricoPONCINO, MASSIMO + | - |
| Preface of the 2010 IAENG International Conference on Electrical Engineering Special Session: Design, Analysis and Tools for Integrated Circuits and Systems. Newswood Limited / Macii, Alberto. - ELETTRONICO. - 2:(2010), pp. 1333-1335. (Intervento presentato al convegno 2010 IAENG International Conference on Electrical Engineering Special Session: Design, Analysis and Tools for Integrated Circuits and Systems). | 1-gen-2010 | MACII, Alberto | IMECS2010_pp1333-1335.pdf |
| An integrated thermal estimation framework for industrial embedded platforms / Acquaviva, Andrea; Calimera, Andrea; Macii, Alberto; Poncino, Massimo; Macii, Enrico; Giaconia, M.; Parrella, G.. - (2010), pp. 293-298. (Intervento presentato al convegno GLSVLSI'10: Great Lakes Symposium on VLSI tenutosi a Providence, Rhode Island nel May 2010) [10.1145/1785481.1785550]. | 1-gen-2010 | ACQUAVIVA, ANDREACALIMERA, ANDREAMACII, AlbertoPONCINO, MASSIMOMACII, Enrico + | - |
| An integrated thermal estimation framework for industrial embedded platforms / Acquaviva, Andrea; Calimera, Andrea; Macii, Alberto; Poncino, Massimo; Macii, Enrico; Matteo, Giaconia; Claudio, Parrella. - STAMPA. - (2010). (Intervento presentato al convegno ACM Great Lakes Symposium on VLSI 2010). | 1-gen-2010 | ACQUAVIVA, ANDREACALIMERA, ANDREAMACII, AlbertoPONCINO, MASSIMOEnrico Macii + | - |
| THERMINATOR: Modeling, control and management of thermal effects in electronic circuits of the future / Calimera, Andrea; Macii, Alberto; Macii, Enrico; S., Rinaudo; Poncino, Massimo. - (2010), pp. 171-176. (Intervento presentato al convegno THERMINIC-10: International Workshop on Thermal Investigations of ICs and Systems tenutosi a Barcelona nel October). | 1-gen-2010 | CALIMERA, ANDREAMACII, AlbertoMACII, EnricoPONCINO, MASSIMO + | - |
| Minimizing temperature sensitivity of dual-Vt CMOS circuits using Simulated-Annealing on ISING-like models / M., Caldera; Calimera, Andrea; Macii, Alberto; Macii, Enrico; Poncino, Massimo. - (2010), pp. 189-194. (Intervento presentato al convegno THERMINIC-2010: IEEE International Workshop on Thermal Investigations of ICs and Systems tenutosi a Barcelona (ESP) nel October). | 1-gen-2010 | CALIMERA, ANDREAMACII, AlbertoMACII, EnricoPONCINO, MASSIMO + | - |
| Power-aware partitioning of data converters / Bonanno, Alberto; Bocca, Alberto; Macii, Alberto; Macii, Enrico. - (2010), pp. 358-363. (Intervento presentato al convegno 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2010 tenutosi a Madrid (ESP) nel 27-29 Sept. 2010) [10.1109/VLSISOC.2010.5642687]. | 1-gen-2010 | BONANNO, ALBERTOBOCCA, ALBERTOMACII, AlbertoMACII, Enrico | - |
| Data-Driven Clock Gating for Digital Filters / Bonanno, Alberto; Bocca, Alberto; Macii, Alberto; Macii, Enrico; Poncino, Massimo. - 5953:(2010), pp. 96-105. (Intervento presentato al convegno 19th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS 2009) tenutosi a Delft (NL) nel September 9-11, 2009) [10.1007/978-3-642-11802-9_14]. | 1-gen-2010 | BONANNO, ALBERTOBOCCA, ALBERTOMACII, AlbertoMACII, EnricoPONCINO, MASSIMO | - |
| A refinement methodology for clock gating optimization at layout level in digital circuits / Benini, L.; Bonanno, Alberto; Bocca, Alberto; Macii, Alberto; Macii, Enrico; Nagel, J. L.; Piguet, C.; Poncino, Massimo. - In: JOURNAL OF LOW POWER ELECTRONICS. - ISSN 1546-1998. - 6:1(2010), pp. 44-55. [10.1166/jolpe.2010.1055] | 1-gen-2010 | BONANNO, ALBERTOBOCCA, ALBERTOMACII, AlbertoMACII, EnricoPONCINO, MASSIMO + | - |
| Thermal-Aware Clock Tree Design to Increase Timing Reliability of Embedded SoCs / Chakraborty, A.; Duraisami, k. sithambaram p.; Macii, Alberto; Macii, Enrico; Poncino, Massimo. - In: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS. - ISSN 1549-8328. - 57:10(2010), pp. 2741-2752. [10.1109/TCSI.2010.2046959] | 1-gen-2010 | MACII, AlbertoMACII, EnricoPONCINO, MASSIMO + | - |
| Preface of the 2011 IAENG International Conference on Electrical Engineering Special Session: Design, Analysis and Tools for Integrated Circuits and Systems / Macii, Alberto. - ELETTRONICO. - 2:(2011), pp. 1028-1030. | 1-gen-2011 | MACII, Alberto | IMECS2011_pp1028-1030.pdf |
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