Reliability Analysis of TMR Configurations in SRAM-Based FPGAs Using Static Evaluation

SRAM-based FPGAs have been increasingly adopted in recent years due to their high performance and power efficiency. As a result, they are also being considered for space missions. However, SRAM-based FPGAs are inherently vulnerable to radiation effects in space environments. High-energy particles can induce bit flips in the configuration memory, potentially altering the functionality of the implemented design. To address this issue, several mitigation techniques have been proposed, among which Triple Modular Redundancy (TMR) is the most widely used. Although effective, TMR significantly increases resource utilization. This overhead may limit its applicability on certain devices and can also raise the probability of radiation-induced faults affecting active resources. In this paper, we investigate different levels of granularity for applying TMR in custom designs implemented on a Xilinx KU060 FPGA, with the aim of balancing fault tolerance and resource efficiency.