Pre-processing Functional And Physical Defect Equivalences To Accelerate Cell-Aware Model Generation

Detecting intra-cell defects accurately is essential to ensure rapid yield ramp-up and minimize test escapes. Functional fault models like stuck-at and transition faults do not fully capture the complexity of these transistor-level defects. Cell-aware Test (CAT) was developed to address this, but its characterization phase has a significant runtime cost. This paper presents a novel pre-characterization methodology that reduces CAT characterization time by identifying intra-cell transistor defects equivalent to functional faults. By applying structural equivalence and fault propagation rules, the proposed approach reduces the Cell-Aware defect count to be simulated by removing defects from the list which are proven to be equivalent to functional faults, while keeping track of the equivalent defects for diagnosis purposes. Validation on two different 28 nm and a 130 nm industrial technology libraries demonstrated an overall reduction of 25% in defect count requiring analog characterization, resulting in an overall runtime reduction of about 7.3%. This method reduces the CAT workload, accelerating the time-consuming fault characterization step, without compromising defect detection or diagnosis accuracy.