This paper introduces NLCMap, a framework for the mapping space exploration targeting Non-Linear Convolutional Networks (NLCNs). NLCNs [1] are a novel neural network model that improves performances in certain computer vision applications by introducing a non-linearity in the weights computation. NLCNs are more challenging to efficiently map onto hardware accelerators if compared to traditional Convolutional Neural Networks (CNNs), due to data dependencies and additional computations. To this aim, we propose NLCMap, a framework that, given an NLC layer and a generic hardware accelerator with a certain on-chip memory budget, finds the optimal mapping that minimizes the accesses to the off-chip memory, which are often the critical aspect in CNNs acceleration.
NLCMAP: A Framework for the Efficient Mapping of Non-Linear Convolutional Neural Networks on FPGA Accelerators / Aiello, Giuseppe; Bussolino, Beatrice; Valpreda, Emanuele; Ruo Roch, Massimo; Masera, Guido; Martina, Maurizio; Marsi, Stefano. - ELETTRONICO. - (2022). (Intervento presentato al convegno International Conference on Image Processing tenutosi a Bordeaux, France nel 16-19 October 2022) [10.1109/ICIP46576.2022.9897288].
NLCMAP: A Framework for the Efficient Mapping of Non-Linear Convolutional Neural Networks on FPGA Accelerators
Bussolino, Beatrice;Valpreda, Emanuele;Ruo Roch, Massimo;Masera, Guido;Martina, Maurizio;
2022
Abstract
This paper introduces NLCMap, a framework for the mapping space exploration targeting Non-Linear Convolutional Networks (NLCNs). NLCNs [1] are a novel neural network model that improves performances in certain computer vision applications by introducing a non-linearity in the weights computation. NLCNs are more challenging to efficiently map onto hardware accelerators if compared to traditional Convolutional Neural Networks (CNNs), due to data dependencies and additional computations. To this aim, we propose NLCMap, a framework that, given an NLC layer and a generic hardware accelerator with a certain on-chip memory budget, finds the optimal mapping that minimizes the accesses to the off-chip memory, which are often the critical aspect in CNNs acceleration.File | Dimensione | Formato | |
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https://hdl.handle.net/11583/2970823