With the introduction of the ISO26262 standard in the automotive field, numerous solutions for the in-field and on-line testing have been proposed. Among the several test solutions available, the Built-In Self-Test (BIST) approach is the most used for manufacturing test of chips, while the Software-Based Self-Test (SBST) approach is the most commonly used for on-line test the modern processors. This paper faces a very concrete problem concerning SBST development. In order to address more market demands, semiconductor industries are usually developing families of microcontroller, usually based on similar processors, instead of a single instance. This variety of architectures makes the development of SBST programs a repetitive, time and human consuming activity. The main aim of this work is to propose a methodology according with the SBST paradigm that permits to develop test programs able to achieve high coverage on different microcontrollers of the same family. The developed test programs are not showing any significant drop in coverage performance when they are used on different processors included in product of the same microcontroller family. The approach is based on the analysis of the processor hierarchy to identify the common units between the processors of the same family, first of all looking at those that show design differences. The module classification permits than to plan the most effective SBST development. A segment of industrial microcontrollers developed by STMicroelectronics for the automotive field, adapting many processors belonging to the same processor family, is used as a case of study. The experimental results demonstrate the effectiveness of the proposed approach, i.e., to reach the same fault coverage figures over many processors while dramatically reducing the development time.

An efficient strategy for the development of software test libraries for an automotive microcontroller family / Piumatti, D.; Sanchez, E.; Bernardi, P.; Martorana, R.; Pernice, M. A.. - In: MICROELECTRONICS RELIABILITY. - ISSN 0026-2714. - ELETTRONICO. - 115 (113962):(2020). [10.1016/j.microrel.2020.113962]

An efficient strategy for the development of software test libraries for an automotive microcontroller family

Piumatti, D.;Sanchez, E.;Bernardi, P.;
2020

Abstract

With the introduction of the ISO26262 standard in the automotive field, numerous solutions for the in-field and on-line testing have been proposed. Among the several test solutions available, the Built-In Self-Test (BIST) approach is the most used for manufacturing test of chips, while the Software-Based Self-Test (SBST) approach is the most commonly used for on-line test the modern processors. This paper faces a very concrete problem concerning SBST development. In order to address more market demands, semiconductor industries are usually developing families of microcontroller, usually based on similar processors, instead of a single instance. This variety of architectures makes the development of SBST programs a repetitive, time and human consuming activity. The main aim of this work is to propose a methodology according with the SBST paradigm that permits to develop test programs able to achieve high coverage on different microcontrollers of the same family. The developed test programs are not showing any significant drop in coverage performance when they are used on different processors included in product of the same microcontroller family. The approach is based on the analysis of the processor hierarchy to identify the common units between the processors of the same family, first of all looking at those that show design differences. The module classification permits than to plan the most effective SBST development. A segment of industrial microcontrollers developed by STMicroelectronics for the automotive field, adapting many processors belonging to the same processor family, is used as a case of study. The experimental results demonstrate the effectiveness of the proposed approach, i.e., to reach the same fault coverage figures over many processors while dramatically reducing the development time.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/2850363