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EnglishThis paper presents a custom MSP430™-compatible microcontroller, specifically tailored for quasi-digital processing Address Event Representation (AER) events. Main target applications are fully reprogrammable sensory systems where events pre-processing has to be carried out by means of easily-tunable elaboration algorithms; a microcontroller-based design could provide the right trade-off between flexibility and performance. Key features are good time resolution, high reactivity, on-demand only processing and power consumption reduction. The proposed architecture has been analyzed and compared with an open source MSP430TM-compliant microcontroller (openMSP430) in terms of performance and power consumption. Accurate and wide cases-spectrum simulations (targeting ASIC technology) show an average power consumption reduction ranging from 50 % (same operating frequency) up to 79 % (same maximum event rate); equivalently, with the same power budget, an average improvement of either resolution of 84 % or maximum event rate of 1020 % is obtained.
A low power architecture for AER event-processing microcontroller / Aiassa, Simone; Motto Ros, Paolo; Masera, Guido; Martina, Maurizio. - STAMPA. - 1(2018), pp. 1-4. ((Intervento presentato al convegno 2017 IEEE Biomedical Circuits and Systems Conference (BioCAS) tenutosi a Torino nel 19-21 Ottobre 2017 [10.1109/BIOCAS.2017.8325170].
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| Titolo: | A low power architecture for AER event-processing microcontroller | |
| Autori: | ||
| Data di pubblicazione: | 2018 | |
| Abstract: | This paper presents a custom MSP430™-compatible microcontroller, specifically tailored for quasi-...digital processing Address Event Representation (AER) events. Main target applications are fully reprogrammable sensory systems where events pre-processing has to be carried out by means of easily-tunable elaboration algorithms; a microcontroller-based design could provide the right trade-off between flexibility and performance. Key features are good time resolution, high reactivity, on-demand only processing and power consumption reduction. The proposed architecture has been analyzed and compared with an open source MSP430TM-compliant microcontroller (openMSP430) in terms of performance and power consumption. Accurate and wide cases-spectrum simulations (targeting ASIC technology) show an average power consumption reduction ranging from 50 % (same operating frequency) up to 79 % (same maximum event rate); equivalently, with the same power budget, an average improvement of either resolution of 84 % or maximum event rate of 1020 % is obtained. | |
| ISBN: | 978-1-5090-5803-7 | |
| Appare nelle tipologie: | 4.1 Contributo in Atti di convegno |
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| 08325170.pdf | Pubblicato | 2a Post-print versione editoriale / Version of Record | Non Pubblico - Accesso privato/ristretto | Administrator Richiedi una copia |
http://hdl.handle.net/11583/2705710
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