Testing cache memories is a challenging task, especially when targeting complex and high-frequency devices such as modern processors. While the memory array in a cache is usually tested exploiting BIST circuits that implement March-based solutions, there is no established methodology to tackle the cache controller logic, mainly due to its limited accessibility. One possible approach is Software-Based Self Testing (SBST): however, devising test programs able to thoroughly excite the replacement logic and made the results observable is not trivial. A test program generation approach, based on a Finite State Machine (FSM) model of the replacement mechanism, is proposed in this paper. The effectiveness of the method is assessed on a case study considering a data cache implementing the pLRU replacement policy.
Functional test generation for the pLRU replacement mechanism of embedded cache memories / PEREZ HOLGIN, W. J.; SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo; Tonda, ALBERTO PAOLO; VELASCO MEDINA, J.. - STAMPA. - (2011), pp. 1-6. (Intervento presentato al convegno Proceedings of the 12th IEEE Latin-American Test Workshop) [10.1109/LATW.2011.5985898].
Functional test generation for the pLRU replacement mechanism of embedded cache memories
SANCHEZ SANCHEZ, EDGAR ERNESTO;SONZA REORDA, Matteo;TONDA, ALBERTO PAOLO;
2011
Abstract
Testing cache memories is a challenging task, especially when targeting complex and high-frequency devices such as modern processors. While the memory array in a cache is usually tested exploiting BIST circuits that implement March-based solutions, there is no established methodology to tackle the cache controller logic, mainly due to its limited accessibility. One possible approach is Software-Based Self Testing (SBST): however, devising test programs able to thoroughly excite the replacement logic and made the results observable is not trivial. A test program generation approach, based on a Finite State Machine (FSM) model of the replacement mechanism, is proposed in this paper. The effectiveness of the method is assessed on a case study considering a data cache implementing the pLRU replacement policy.File | Dimensione | Formato | |
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https://hdl.handle.net/11583/2380322
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