COLUCCIO, ANDREA

COLUCCIO, ANDREA  

Dipartimento di Elettronica e Telecomunicazioni  

058980  

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Citazione Data di pubblicazione Autori File
DExIMA: Design Explorer for In-Memory Architectures / Coluccio, A., Naclerio, A., Vacca, M., Turvani, G., Graziano, M., Zamboni, M.. - In: IEEE ACCESS. - ISSN 2169-3536. - 13:(2025), pp. 79217-79236. [10.1109/access.2025.3566614] 1-gen-2025 Coluccio, AndreaNaclerio, AlessioTurvani, GiovannaGraziano, MariagraziaZamboni, Maurizio + DExIMA_Design_Explorer_for_In-Memory_Architectures.pdf
MeMPA: A Memory Mapped M-SIMD Co-Processor to Cope with the Memory Wall Issue / Guastamacchia, A., Coluccio, A., Riente, F., Turvani, G., Graziano, M., Zamboni, M., Vacca, M.. - In: ELECTRONICS. - ISSN 2079-9292. - 13:5(2024), pp. 1-16. [10.3390/electronics13050854] 1-gen-2024 Guastamacchia, AngelaColuccio, AndreaRiente, FabrizioTurvani, GiovannaGraziano, MariagraziaZamboni, MaurizioVacca, Marco electronics-13-00854.pdf
Exploration of Beyond von Neumann Computing to solve the Memory-Wall issue / Coluccio, Andrea. - (2023 Jul 12), pp. 1-321. 12-lug-2023 COLUCCIO, ANDREA conv_doctoral_thesis_andrea_coluccio_reviewed.pdfconv_thesis_summary_andrea_coluccio.pdf
Hybrid-SIMD: a Modular and Reconfigurable approach to Beyond von Neumann Computing / Coluccio, A., Casale, U., Guastamacchia, A., Turvani, G., Vacca, M., Ruo Roch, M., Zamboni, M., Graziano, M.. - In: IEEE TRANSACTIONS ON COMPUTERS. - ISSN 0018-9340. - ELETTRONICO. - 71:9(2022), pp. 2287-2299. [10.1109/TC.2021.3127354] 1-gen-2022 Coluccio A.Guastamacchia A.Turvani G.Vacca M.Ruo Roch M.Zamboni M.Graziano M. + Hybrid-SIMD_a_Modular_and_Reconfigurable_approach_to_Beyond_von_Neumann_Computing.pdfHybrid-SIMD_A_Modular_and_Reconfigurable_Approach_to_Beyond_von_Neumann_Computing.pdf
RISC-Vlim, a RISC-V Framework for Logic-in-Memory Architectures / Coluccio, A., Ieva, A., Riente, F., RUO ROCH, M., Ottavi, M., Vacca, M.. - In: ELECTRONICS. - ISSN 2079-9292. - ELETTRONICO. - 11:19(2022), p. 2990. [10.3390/electronics11192990] 1-gen-2022 Andrea ColuccioFabrizio RienteMassimo Ruo RochMarco Vacca + electronics-11-02990.pdf
vlsi-nanocomputing/risc-v-lim-architecture: version-1.0.0 / Riente, F., Coluccio, A.. - (2022). [10.5281/zenodo.6356705] 1-gen-2022 Riente, FabrizioColuccio, Andrea -
Octantis: An Exploration Tool for Beyond von Neumann architectures / Marchesin, A., Turvani, G., Coluccio, A., Riente, F., Vacca, M., Roch, M.R., Graziano, M., Zamboni, M.. - ELETTRONICO. - (2021), pp. 1-5. (International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) 28-30 June 2021) [10.1109/DTIS53253.2021.9505135]. 1-gen-2021 Marchesin, AndreaTurvani, GiovannaColuccio, AndreaRiente, FabrizioVacca, MarcoRoch, Massimo RuoGraziano, MariagraziaZamboni, Maurizio DTIS_2021___Octantis.pdfOctantis_An_Exploration_Tool_for_Beyond_von_Neumann_architectures.pdf
Logic-in-Memory Computation: Is It Worth it? A Binary Neural Network Case Study / Coluccio, A., Vacca, M., Turvani, G.. - In: JOURNAL OF LOW POWER ELECTRONICS AND APPLICATIONS. - ISSN 2079-9268. - 10:1(2020), p. 7. [10.3390/jlpea10010007] 1-gen-2020 Coluccio, AndreaVacca, MarcoTurvani, Giovanna Coluccio-Logic.pdf
WINNER: a high speed high energy efficient Neural Network implementation for image classification / Antonietta, S.D., Coluccio, A., Turvani, G., Vacca, M., Graziano, M., Zamboni, M.. - (2019), pp. 29-32. (2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS) ) [10.1109/ICECS46596.2019.8965001]. 1-gen-2019 COLUCCIO, ANDREATurvani, GiovannaVacca, MarcoGraziano, MariagraziaZamboni, Maurizio + 08965001.pdfCOLUCCIO_ICECS_2019.pdf