Archivio Istituzionale della RicercaCOLUCCIO, ANDREA
COLUCCIO, ANDREA
Dipartimento di Elettronica e Telecomunicazioni
058980
Hybrid-SIMD: a Modular and Reconfigurable approach to Beyond von Neumann Computing
2021 Coluccio, A.; Casale, U.; Guastamacchia, A.; Turvani, G.; Vacca, M.; Ruo Roch, M.; Zamboni, M.; Graziano, M.
Logic-in-Memory Computation: Is It Worth it? A Binary Neural Network Case Study
2020 Coluccio, Andrea; Vacca, Marco; Turvani, Giovanna
Octantis: An Exploration Tool for Beyond von Neumann architectures
2021 Marchesin, Andrea; Turvani, Giovanna; Coluccio, Andrea; Riente, Fabrizio; Vacca, Marco; Roch, Massimo Ruo; Graziano, Mariagrazia; Zamboni, Maurizio
RISC-Vlim, a RISC-V Framework for Logic-in-Memory Architectures
2022 Coluccio, Andrea; Ieva, Antonia; Riente, Fabrizio; RUO ROCH, Massimo; Ottavi, Marco; Vacca, Marco
vlsi-nanocomputing/risc-v-lim-architecture: version-1.0.0
2022 Riente, Fabrizio; Coluccio, Andrea
WINNER: a high speed high energy efficient Neural Network implementation for image classification
2019 Antonietta, Simone Domenico; Coluccio, Andrea; Turvani, Giovanna; Vacca, Marco; Graziano, Mariagrazia; Zamboni, Maurizio
| Citazione | Data di pubblicazione | Autori | File |
|---|---|---|---|
| Hybrid-SIMD: a Modular and Reconfigurable approach to Beyond von Neumann Computing / Coluccio, A.; Casale, U.; Guastamacchia, A.; Turvani, G.; Vacca, M.; Ruo Roch, M.; Zamboni, M.; Graziano, M.. - In: IEEE TRANSACTIONS ON COMPUTERS. - ISSN 0018-9340. - ELETTRONICO. - (2021), pp. 1-1. [10.1109/TC.2021.3127354] | 1-gen-2021 | Coluccio A.Guastamacchia A.Turvani G.Vacca M.Ruo Roch M.Zamboni M.Graziano M. + | Hybrid-SIMD_a_Modular_and_Reconfigurable_approach_to_Beyond_von_Neumann_Computing.pdf |
| Logic-in-Memory Computation: Is It Worth it? A Binary Neural Network Case Study / Coluccio, Andrea; Vacca, Marco; Turvani, Giovanna. - In: JOURNAL OF LOW POWER ELECTRONICS AND APPLICATIONS. - ISSN 2079-9268. - 10:1(2020), p. 7. [10.3390/jlpea10010007] | 1-gen-2020 | Coluccio, AndreaVacca, MarcoTurvani, Giovanna | Coluccio-Logic.pdf |
| Octantis: An Exploration Tool for Beyond von Neumann architectures / Marchesin, Andrea; Turvani, Giovanna; Coluccio, Andrea; Riente, Fabrizio; Vacca, Marco; Roch, Massimo Ruo; Graziano, Mariagrazia; Zamboni, Maurizio. - ELETTRONICO. - (2021), pp. 1-5. (Intervento presentato al convegno International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) nel 28-30 June 2021) [10.1109/DTIS53253.2021.9505135]. | 1-gen-2021 | Marchesin, AndreaTurvani, GiovannaColuccio, AndreaRiente, FabrizioVacca, MarcoRoch, Massimo RuoGraziano, MariagraziaZamboni, Maurizio | DTIS_2021___Octantis.pdf; Octantis_An_Exploration_Tool_for_Beyond_von_Neumann_architectures.pdf |
| RISC-Vlim, a RISC-V Framework for Logic-in-Memory Architectures / Coluccio, Andrea; Ieva, Antonia; Riente, Fabrizio; RUO ROCH, Massimo; Ottavi, Marco; Vacca, Marco. - In: ELECTRONICS. - ISSN 2079-9292. - ELETTRONICO. - 11:19(2022), p. 2990. [10.3390/electronics11192990] | 1-gen-2022 | Andrea ColuccioFabrizio RienteMassimo Ruo RochMarco Vacca + | electronics-11-02990.pdf |
| vlsi-nanocomputing/risc-v-lim-architecture: version-1.0.0 / Riente, Fabrizio; Coluccio, Andrea. - (2022). [10.5281/zenodo.6356705] | 1-gen-2022 | Riente, FabrizioColuccio, Andrea | - |
| WINNER: a high speed high energy efficient Neural Network implementation for image classification / Antonietta, Simone Domenico; Coluccio, Andrea; Turvani, Giovanna; Vacca, Marco; Graziano, Mariagrazia; Zamboni, Maurizio. - (2019), pp. 29-32. (Intervento presentato al convegno 2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)) [10.1109/ICECS46596.2019.8965001]. | 1-gen-2019 | COLUCCIO, ANDREATurvani, GiovannaVacca, MarcoGraziano, MariagraziaZamboni, Maurizio + | 08965001.pdf; COLUCCIO_ICECS_2019.pdf |