vlsi-nanocomputing/risc-v-lim-architecture: version-1.0.0

The aim of the project is to propose a RISC-Vlim microprocessor that supports Logic-in-Memory operations. The RISC-Vlim is based on the RISC-V ISA where the data memory is replaced with a memory capable of doing simple operations on the data stored inside it. The preliminary results demonstrate how the use of such memories can improve the algorithm execution speed, reducing the need for complex solutions and saving energy. The project uses the available RISC-V IP and the Logic-in-memory concept in order to improve the average execution time of the RISC-V memory operations and then reduce the overall execution time in programs. The goal has been reached by introducing a new memory model, capable to perform logic operations additionally to the simple reads or writes. To exploit this new memory capability the RISC-V ISA has been enlarged.