Archivio Istituzionale della RicercaSANTORO, GIULIA
SANTORO, GIULIA
Dipartimento di Elettronica e Telecomunicazioni
039971
Bitmap Index: A Processing-in-Memory Reconfigurable Implementation
2020 Andrighetti, M.; Turvani, G.; Santoro, G.; Vacca, M.; Ruo Roch, M.; Graziano, M.; Zamboni, M.
Design-Space Exploration of Pareto-Optimal Architectures for Deep Learning with DVFS
2018 Santoro, Giulia; Casu, Mario R.; Peluso, Valentino; Calimera, Andrea; Alioto, Massimo
Energy-performance design exploration of a low-power microprogrammed deep-learning accelerator
2018 Santoro, Giulia; Casu, Mario R.; Peluso, Valentino; Calimera, Andrea; Alioto, Massimo
3D design of a pNML random access memory
2017 Ferrara, Antonino; Garlando, Umberto; Gnoli, Luca; Santoro, Giulia; Zamboni, Maurizio
NANOcom: A Mosaic Approach for nanoelectronic circuits design
2017 Bollo, Matteo; Santoro, Giulia; Garlando, Umberto; Zamboni, Maurizio
Logic-In-Memory: A NanoMagnet Logic Implementation
2015 M., Cofano; Santoro, Giulia; Vacca, Marco; D., Pala; Causapruno, Giovanni; Cairo, Fabrizio; Riente, Fabrizio; Turvani, Giovanna; RUO ROCH, Massimo; Graziano, Mariagrazia; Zamboni, Maurizio
| Citazione | Data di pubblicazione | Autori | File |
|---|---|---|---|
| Bitmap Index: A Processing-in-Memory Reconfigurable Implementation / Andrighetti, M., Turvani, G., Santoro, G., Vacca, M., Ruo Roch, M., Graziano, M., Zamboni, M.. - 627:(2020), pp. 173-179. (International Conference on Applications in Electronics Pervading Industry, Environment and Society, ApplePies 2019 ita 2019) [10.1007/978-3-030-37277-4_20]. | 1-gen-2020 | Andrighetti M.Turvani G.Santoro G.Vacca M.Ruo Roch M.Graziano M.Zamboni M. | Andrighetti2020_Chapter_BitmapIndexAProcessing-in-Memo.pdf |
| Design-Space Exploration of Pareto-Optimal Architectures for Deep Learning with DVFS / Santoro, G., Casu, M.R., Peluso, V., Calimera, A., Alioto, M.. - (2018), pp. 1-5. (IEEE International Symposium on Circuits and Systems (ISCAS) ) [10.1109/ISCAS.2018.8351685]. | 1-gen-2018 | Santoro, GiuliaCasu, Mario R.Peluso, ValentinoCalimera, Andrea + | Calimera_design-space.pdf |
| Energy-performance design exploration of a low-power microprogrammed deep-learning accelerator / Santoro, G., Casu, M.R., Peluso, V., Calimera, A., Alioto, M.. - (2018), pp. 1151-1154. (Design, Automation & Test in Europe Conference & Exhibition (DATE) Dresden ) [10.23919/DATE.2018.8342185]. | 1-gen-2018 | Santoro, GiuliaCasu, Mario R.Peluso, ValentinoCalimera, Andrea + | Calimera-Energy-performance.pdf |
| 3D design of a pNML random access memory / Ferrara, A., Garlando, U., Gnoli, L., Santoro, G., Zamboni, M.. - ELETTRONICO. - (2017), pp. 5-8. (13th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2017 Atahotel Naxos Beach Conference Center, ita 2017) [10.1109/PRIME.2017.7974093]. | 1-gen-2017 | GARLANDO, UMBERTOGNOLI, LUCASANTORO, GIULIAZAMBONI, Maurizio + | - |
| NANOcom: A Mosaic Approach for nanoelectronic circuits design / Bollo, M., Santoro, G., Garlando, U., Zamboni, M.. - ELETTRONICO. - (2017), pp. 1-6. (12th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, DTIS 2017 Palma de Mallorca, Spain 2017) [10.1109/DTIS.2017.7930161]. | 1-gen-2017 | BOLLO, MATTEOSANTORO, GIULIAGARLANDO, UMBERTOZAMBONI, Maurizio | - |
| Logic-In-Memory: A NanoMagnet Logic Implementation / M., C., Santoro, G., Vacca, M., D., P., Causapruno, G., Cairo, F., Riente, F., Turvani, G., RUO ROCH, M., Graziano, M., Zamboni, M.. - ELETTRONICO. - (2015), pp. 286-291. (ISVLSI Montpellier July 2015) [10.1109/ISVLSI.2015.121]. | 1-gen-2015 | SANTORO, GIULIAVACCA, MARCOCAUSAPRUNO, GIOVANNICAIRO, FABRIZIORIENTE, FABRIZIOTURVANI, GIOVANNARUO ROCH, MassimoGRAZIANO, MARIAGRAZIAZAMBONI, Maurizio + | ISVLSI2015-pre.pdf |