During the years, microprocessors went through impressive performance improvement thanks to technology development. CPUs became able to process great quantities of data. Memories also faced growth especially in density, but as far as speed is concerned the improvement did not proceed as the same rate. Processing-in-Memory (PIM) consists in enhancing the storage unit of a system, adding computing capabilities to memory cells, partially eliminating the need to transfer data from memory to execution unit. In this paper, a PIM architecture is presented for bulk bitwise operation mapped on the Bitmap Index application. The architecture is a memory array with logical computing abilities inside the cells. The array is a configurable modular architecture distributed in different banks, each bank is able to perform a different operation at the same time. This architecture has remarkable performance being faster than other solutions available in literature.

Bitmap Index: A Processing-in-Memory Reconfigurable Implementation / Andrighetti, M.; Turvani, G.; Santoro, G.; Vacca, M.; Ruo Roch, M.; Graziano, M.; Zamboni, M.. - 627:(2020), pp. 173-179. ((Intervento presentato al convegno International Conference on Applications in Electronics Pervading Industry, Environment and Society, ApplePies 2019 tenutosi a ita nel 2019 [10.1007/978-3-030-37277-4_20].

Bitmap Index: A Processing-in-Memory Reconfigurable Implementation

Andrighetti M.;Turvani G.;Santoro G.;Vacca M.;Ruo Roch M.;Graziano M.;Zamboni M.
2020

Abstract

During the years, microprocessors went through impressive performance improvement thanks to technology development. CPUs became able to process great quantities of data. Memories also faced growth especially in density, but as far as speed is concerned the improvement did not proceed as the same rate. Processing-in-Memory (PIM) consists in enhancing the storage unit of a system, adding computing capabilities to memory cells, partially eliminating the need to transfer data from memory to execution unit. In this paper, a PIM architecture is presented for bulk bitwise operation mapped on the Bitmap Index application. The architecture is a memory array with logical computing abilities inside the cells. The array is a configurable modular architecture distributed in different banks, each bank is able to perform a different operation at the same time. This architecture has remarkable performance being faster than other solutions available in literature.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/2851503