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Citazione Data di pubblicazione Autori File
Combined software and hardware techniques for the design of reliable IP processors / Rebaudengo, Maurizio; Sterpone, Luca; Violante, Massimo; C., Bolchini; A., Miele; D., Sciuto. - (2006), pp. 265-273. (Intervento presentato al convegno 21th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems) [10.1109/DFT.2006.18]. 1-gen-2006 REBAUDENGO, MaurizioSTERPONE, LucaVIOLANTE, MASSIMO + -
HYBRID FAULT DETECTION TECHNIQUE A CASE STUDY ON VIRTEX-II PRO'S POWERPC / Bernardi, Paolo; Sterpone, Luca; Violante, Massimo; M., PORTELA GARCIA. - In: IEEE TRANSACTIONS ON NUCLEAR SCIENCE. - ISSN 0018-9499. - 53:(2006), pp. 3550-3557. [10.1109/TNS.2006.886221] 1-gen-2006 BERNARDI, PAOLOSTERPONE, LucaVIOLANTE, MASSIMO + -
A new reliability-oriented place and route algorithm for SRAM-based FPGAs / Sterpone, Luca; Violante, Massimo. - In: IEEE TRANSACTIONS ON COMPUTERS. - ISSN 0018-9340. - STAMPA. - 55:6(2006), pp. 732-744. [10.1109/TC.2006.82] 1-gen-2006 STERPONE, LUCAVIOLANTE, MASSIMO -
A new hardware/software platform for the soft-error sensitivity evaluation of FPGA devices / Violante, Massimo; SONZA REORDA, Matteo; Sterpone, Luca; Manuzzato, A.; Gerardin, S.; Rech, P.; Bagatin, M.; Paccagnella, A.; Andreani, C.; Gorini, G.; Pietropaolo, A.; Cardarilli, G.; Salsano, A.; Pontarelli, S.; Frost, C.. - STAMPA. - (2007), pp. 1-6. (Intervento presentato al convegno 8th IEEE Latin American Test Workshop tenutosi a Cuzco, Peru). 1-gen-2007 VIOLANTE, MASSIMOSONZA REORDA, MatteoSTERPONE, LucaRECH P. + -
An experimental analysis of SEU sensitiveness of recursive-oriented hardening techniques / Sterpone, Luca; P., REYES MORENO; J. A., Maestro; O., Ruano; P., Reviriego. - (2007). (Intervento presentato al convegno DDECS2007: IEEE Design & Diagnostic of Electronic Circuits & Systems, 2007 tenutosi a Krakow, Poland nel April 11,13. 2007). 1-gen-2007 STERPONE, Luca + -
Soft errors in SRAM-FPGAs: A comparison of two complementary approaches / Alderighi, M.; Casini, F.; D'Angelo, S.; Mancini, M.; Pastore, S.; Sterpone, Luca; Violante, Massimo. - (2007). (Intervento presentato al convegno Radiation and Its Effects on Components and Systems, 2007. RADECS 2007. 9th European Conference on) [10.1109/RADECS.2007.5205521]. 1-gen-2007 STERPONE, LucaVIOLANTE, MASSIMO + -
An Analysis of SEU Effects in Embedded Operating Systems for Real-Time Applications / Sterpone, Luca; Violante, Massimo. - (2007), pp. 3345-3349. (Intervento presentato al convegno International Symposium on Industrial Electronics) [10.1109/ISIE.2007.4375152]. 1-gen-2007 STERPONE, LucaVIOLANTE, MASSIMO -
A new mitigation approach for soft errors in embedded processors / Abate, F.; Sterpone, Luca; Violante, Massimo. - (2007). (Intervento presentato al convegno Radiation and Its Effects on Components and Systems, 2007. RADECS 2007. 9th European Conference on) [10.1109/RADECS.2007.5205504]. 1-gen-2007 STERPONE, LucaVIOLANTE, MASSIMO + -
Self Checking Circuit Optimization by means of Fault Injection Analysis: A Case Study on Reed Solomon Decoders / S., Pontarelli; Sterpone, Luca; G. C., Cardarilli; M., Re; SONZA REORDA, Matteo; A., Salsano; Violante, Massimo. - (2007), pp. 194-196. (Intervento presentato al convegno IOLTS2007: IEEE International On-Line Testing Symposium tenutosi a Hersonissos, Greece nel July 2007). 1-gen-2007 STERPONE, LucaSONZA REORDA, MatteoVIOLANTE, MASSIMO + -
A new decompression system for the configuration process of SRAM-based FPGAs / Sterpone, Luca; Violante, Massimo. - (2007). (Intervento presentato al convegno ACM 17th Great Lake Symposium on VLSI tenutosi a Stresa. nel March 11-13, 2007). 1-gen-2007 STERPONE, LucaVIOLANTE, MASSIMO -
Analytical analysis of the MCUs sensitiveness of TMR architectures in SRAM-based FPGAs / Sterpone, Luca; Violante, Massimo. - (2007). (Intervento presentato al convegno Radiation and Its Effects on Components and Systems, 2007. RADECS 2007. 9th European Conference on) [10.1109/RADECS.2007.5205501]. 1-gen-2007 STERPONE, LucaVIOLANTE, MASSIMO -
Experimental Validation of a Tool for Predicting the Effects of Soft Errors in SRAM-based FPGAs / Sterpone, Luca; Violante, Massimo; HARBOE SORENSEN, R; Merodio, D; Sturesson, F; Weigand, R; Mattsson, S.. - In: IEEE TRANSACTIONS ON NUCLEAR SCIENCE. - ISSN 0018-9499. - 6:(2007), pp. 2576-2583. [10.1109/TNS.2007.910122] 1-gen-2007 STERPONE, LucaVIOLANTE, MASSIMO + -
Evaluating different solutions to design fault tolerant systems with SRAM-based FPGAs / SONZA REORDA, Matteo; Sterpone, Luca; Violante, Massimo; LIMA KASTENSMIDT, F; Carro, L.. - In: JOURNAL OF ELECTRONIC TESTING. - ISSN 0923-8174. - 23:(2007), pp. 47-54. [10.1007/s10836-006-0403-9] 1-gen-2007 SONZA REORDA, MatteoSTERPONE, LucaVIOLANTE, MASSIMO + -
Static and Dynamic Analysis of SEU effects in SRAM-based FPGAs / Sterpone, Luca; Violante, Massimo. - (2007). (Intervento presentato al convegno ETS2007: IEEE European Test Symposium, Freiburg, Germany, 2007 tenutosi a Freiburg, Germany nel May 20-24. 2007.). 1-gen-2007 STERPONE, LucaVIOLANTE, MASSIMO -
Optimization of Self Checking FIR filters by means of Fault Injection Analysis / S., Pontarelli; Sterpone, Luca; G. C., Cardarilli; M., Re; SONZA REORDA, Matteo; A., Salsano; Violante, Massimo. - (2007), pp. 96-104. (Intervento presentato al convegno DFT tenutosi a Roma). 1-gen-2007 STERPONE, LucaSONZA REORDA, MatteoVIOLANTE, MASSIMO + -
Sensitivity evaluation of TMR-hardened circuits to multiple SEUs induced by alpha particles in commercial SRAM-based FPGAs / Manuzzato, A; Rech, P; Gerardin, S; Paccagnella, A; Sterpone, Luca; Violante, Massimo. - (2007), pp. 79-86. (Intervento presentato al convegno International Symposium on Defect and Fault Tolerance in VLSI Systems). 1-gen-2007 RECH PSTERPONE, LucaVIOLANTE, MASSIMO + -
A new FPGA-based edge detection system for the gridding of DNA microarray images / Sterpone, Luca; Violante, Massimo. - (2007). (Intervento presentato al convegno IEEE Instrumentation and Measurement Technology Conference tenutosi a Warsaw. nel May 1-3, 2007). 1-gen-2007 STERPONE, LucaVIOLANTE, MASSIMO -
A new hardware architecture for performing the gridding of DNA microarray images / Sterpone, Luca; Violante, Massimo. - (2007). (Intervento presentato al convegno ACM 17th Great Lake Symposium on VLSI tenutosi a Stresa. nel March 11-13, 2007.). 1-gen-2007 STERPONE, LucaVIOLANTE, MASSIMO -
A new hardware/software platform and a new 1/E neutron source for soft error studies: testing FPGAs at the ISIS facility / Violante, Massimo; Sterpone, Luca; Manuzzato, A; Gerardin, S; Rech, P; Bagatin, M; Paccagnella, A; Andreani, C; Gorini, G; Pietropaolo, A; Cardarilli, G; Pontarelli, S; Frost, C.. - In: IEEE TRANSACTIONS ON NUCLEAR SCIENCE. - ISSN 0018-9499. - (2007), pp. 1184-1189. [10.1109/TNS.2007.902349] 1-gen-2007 VIOLANTE, MASSIMOSTERPONE, LucaRECH P + -
A New Partial Reconfiguration-based Fault-Injection System to Evaluate SEU Effects in SRAM-based FPGAs / Sterpone, Luca; Violante, Massimo. - In: IEEE TRANSACTIONS ON NUCLEAR SCIENCE. - ISSN 0018-9499. - (2007), pp. 965-970. [10.1109/TNS.2007.904080] 1-gen-2007 STERPONE, LucaVIOLANTE, MASSIMO -
Mostrati risultati da 21 a 40 di 260
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