Training Deep Neural Networks (DNNs) on ultra-low-power processing systems is often hindered by the memory-intensive nature of backpropagation. This paper examines the trade-offs between memory and computational costs when mapping DNN training onto an ultra-low-power RISC-V-based System-on-Chip (SoC) with an 8-core accelerator, 1.5 MB on-chip memory, and a 32 MB off-chip memory. To this end, we develop a framework that automates the deployment of complete training graphs across heterogeneous SoCs. The generated code interleaves memory transfer operations with layer-wise processing functions, which are executed either on the host CPU or, for convolutional layers, on the multi-core accelerator. Overall, our work is the first to provide a full system-level analysis of end-To-end DNN training on OS-less, memory-constrained (32 MB of off-chip memory) edge systems, and we show that computation is the primary bottleneck by accounting for up to 91% of the total energy consumption.

A System-Level Performance Analysis of On-Device Learning on an Ultra-Low-Power Edge System / Rusci, M., Hamdi, M.A., Jahier Pagliari, D., Conti, F., Burrello, A.. - (2026), pp. 210-213. (23rd ACM International Conference on Computing Frontiers, CF 2026 Catania (ITA) May 19 - 21, 2026) [10.1145/3801487.3806371].

A System-Level Performance Analysis of On-Device Learning on an Ultra-Low-Power Edge System

Hamdi, Mohamed Amine;Jahier Pagliari, Daniele;Conti, Francesco;Burrello, Alessio
2026

Abstract

Training Deep Neural Networks (DNNs) on ultra-low-power processing systems is often hindered by the memory-intensive nature of backpropagation. This paper examines the trade-offs between memory and computational costs when mapping DNN training onto an ultra-low-power RISC-V-based System-on-Chip (SoC) with an 8-core accelerator, 1.5 MB on-chip memory, and a 32 MB off-chip memory. To this end, we develop a framework that automates the deployment of complete training graphs across heterogeneous SoCs. The generated code interleaves memory transfer operations with layer-wise processing functions, which are executed either on the host CPU or, for convolutional layers, on the multi-core accelerator. Overall, our work is the first to provide a full system-level analysis of end-To-end DNN training on OS-less, memory-constrained (32 MB of off-chip memory) edge systems, and we show that computation is the primary bottleneck by accounting for up to 91% of the total energy consumption.
2026
979-8-4007-2568-5
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/3016396