The inNuCE Research Infrastructure and the Neuromorphic MLOps for AIoT prototyping

Neuromorphic computing promises significant improvements in latency and energy efficiency for machine intelligence at the edge. However, its adoption in the IoT domain is still limited by the heterogeneity of the HW, the immaturity of the toolchains, and the poor reproducibility of experiments. The present paper sets out the inNuCE RI, a two-pillar facility composed of a physical inNuCE Lab and a cloud-based inNuCE HPP. The purpose of the inNuCE RI is to enable developers to prototype, evaluate and compare neuromorphic and conventional end-to-end digital solutions. From a methodological perspective, we formalize the adaptation of MLOps to event-driven sensing and brain-inspired computation as NMLOps. We illustrate how inNuCE RI instantiates NMLOps through containerized toolchains orchestrated with Kubernetes and Slurm-managed heterogeneous resources (neuromorphic chips, FPGAs, GPUs, MCUs). The approach is analyzed on representative AIoT use cases, including HAR, Braille reading, event-based gesture recognition, Hi-Co semantization of memories, navigation tracking, and constraint satisfaction problems. The development of inNuCE RI has been driven by the need to facilitate the transition from prototype (in nuce) to engineered AIoT systems for lower entry barriers and enforce reproducibility. This paves the way for future system-of-systems engineering.