A new algorithm to solve operation scheduling problems is presented and compared with the best ones published. The scheduling algorithm is integrated in a software environment ('ASCAM') reading VHDL behavioral description, giving an optimal architecture and translating it in the input format of a silicon compiler, which performs the final steps of the design.
Operation scheduling in VLSI circuit design / Civera, P.; Masera, G.; Piccinini, G.; Zamboni, M.. - STAMPA. - (1994), pp. 1-5. (Intervento presentato al convegno Electronics Division Colloquium on Synthesis and Optimisation of Logic Systems tenutosi a London, UK, nel 1994).
Operation scheduling in VLSI circuit design
Civera P.;Masera G.;Piccinini G.;Zamboni M.
1994
Abstract
A new algorithm to solve operation scheduling problems is presented and compared with the best ones published. The scheduling algorithm is integrated in a software environment ('ASCAM') reading VHDL behavioral description, giving an optimal architecture and translating it in the input format of a silicon compiler, which performs the final steps of the design.File | Dimensione | Formato | |
---|---|---|---|
Masera-Operation.pdf
accesso riservato
Tipologia:
2a Post-print versione editoriale / Version of Record
Licenza:
Non Pubblico - Accesso privato/ristretto
Dimensione
297.84 kB
Formato
Adobe PDF
|
297.84 kB | Adobe PDF | Visualizza/Apri Richiedi una copia |
Pubblicazioni consigliate
I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
https://hdl.handle.net/11583/2971309