Ultra-Low Power Discrete-Time Readout for CMOS Radiation Sensors

This paper presents the design of a discrete time front-end electronics for CMOS radiation sensors with a power consumption of 11 nW/pixel. The architecture is inspired by the DRAM sensing techniques and it is suitable for small pixel readout. The design is implemented in a 110 nm CMOS technology and consists of a discrete time binary front-end composed by a source follower input stage, an inverting discriminator with offset compensation and a digital buffer. The work is carried out in the framework of the ARCADIA collaboration, which aims to develop fully-depleted monolithic CMOS sensor with low noise, fast charge collection and low power readout, compatible with standard fabrication processes. The first prototype of the discrete-time front-end is implemented in a 2x2 mm$^2$ matrix composed by 4 sectors of 6 columns of 24 50 $mu$m pitch pixels. Simulations show a power density below 1 mW/cm$^2$ for a frame rate of 10 KHz. The circuit performance have been simulated with systematic and random process variation Monte Carlo simulations.